Texas Instruments TMS320C67X/C67X+ DSP - Manual (Page 145)

Compare for Equality, Single-Precision Floating-Point Values CMPEQSP
3-85 Instruction Set SPRU733
Notes:
1) In the case of NaN compared with itself, the result is false.
2) No configuration bits besides those shown in the preceding table are set,
except for the NaNn and DENn bits when appropriate.
Pipeline
Stage
E1
Read src1
src2
Written dst
Unit in use .S
Instruction Type Single-cycle
Delay Slots 0
Functional Unit
Latency 1
See Also CMPEQ, CMPEQDP, CMPGTSP, CMPLTSP
Example CMPEQSP .S1 A1,A2,A3
Before instruction 1 cycle after instruction
A1 C020 0000h −2.5 A1 C020 0000h −2.5
A2 4109 999Ah 8.6 A2 4109 999Ah 8.6
A3 xxxx xxxxh A3 0000 0000h false
Pipeline