Texas Instruments TMS320C67X/C67X+ DSP - Manual (Page 343)

Pipeline Operation Overview
4-11 Pipeline SPRU733
Many C67x DSP instructions are single-cycle instructions, which means they
have only one execution phase (E1). The other instructions require more than
one execute phase. The types of instructions, each of which require different
numbers of execute phases, are described in section 4.2.
Example 4−1. Execute Packet in Figure 4−7
LDDW .D1 *A0−−[4],B5:B4 ; E1 Phase
|| ADDSP .L1 A9,A10,A12
|| SUBSP .L2X B12,A2,B12
|| MPYSP .M1X A6,B13,A11
|| MPYSP .M2 B5,B13,B11
|| ABSSP .S1 A12,A15
LDDW .D1 *A0++[5],A7:A6 ; DC Phase
|| ADDSP .L1 A12,A11,A12
|| ADDSP .L2 B10,B11,B12
|| MPYSP .M1X A4,B6,A9
|| MPYSP .M2X A7,B6,B9
|| CMPLTSP .S1 A15,A8,A1
|| ABSSP .S2 B12,B15
LOOP:
[!B2]
LDDW .D1 *A0++[2],A5:A4 ; DP and PS Phases
||[B2] ZERO .D2 B0
|| SUBSP .L1 A12,A2,A12
|| ADDSP .L2 B9,B12,B12
|| MPYSP .M1X A5,B7,A10
|| MPYSP .M2 B4,B7,B10
||[B0] B .S1 LOOP
||[!B1] CMPLTSP .S2 B15,B8,B1
[!B2] LDDW .D1 *A0−−[4],B5:B4 ; PR and PG Phases
||[B0] SUB .D2 B0,2,B0
|| ADDSP .L1 A9,A10,A12
|| SUBSP .L2X B12,A2,B12
|| MPYSP .M1X A6,B13,A11
|| MPYSP .M2 B5,B13,B11
|| ABSSP .S1 A12,A15
||[A1] MVK .S2 1,B2
[!B2] LDDW .D1 *A0++[5],A7:A6 ; PW Phase
||[B1] MV .D2 B1,B2
|| ADDSP .L1 A12,A11,A12
|| ADDSP .L2 B10,B11,B12
|| MPYSP .M1X A4,B6,A9
||[!A1] CMPLTSP .S1 A15,A8,A1
|| ABSSP .S2 B12,B15