Texas Instruments TMS320C67X/C67X+ DSP - Manual (Page 387)

Functional Unit Constraints
4-55 Pipeline SPRU733
Table 4−39 shows the instruction constraints for LDDW instructions executing
on the .D unit.
Table 4−39. LDDW Instruction With Long Write Instruction Constraints
Instruction Execution
Cycle 1 2 3 4 5 6
LDDW RW W
Instruction Type Subsequent Same-Unit Instruction Executable
Instruction with long result n n n Xw n
Legend: = E1 phase of the single-cycle instruction; R = Sources read for the instruction; W = Destinations written for the
instruction; n = Next instruction can enter E1 during cycle; Xw = Next instruction cannot enter E1 during cycle-write
constraint