Texas Instruments TMS320C67X/C67X+ DSP - Manual (Page 420)

Programming Considerations
5-25 Interrupts SPRU733
Example 5−13. C Interrupt Service Routine That Allows Nested Interrupts
/* c6x.h contains declarations of the C6x control registers */
#include <c6x.h>
interrupt void isr(void)
{
unsigned old_csr;
unsigned old_irp;
old_irp = IRP ;/* Save IRP */
old_csr = CSR ;/* Save CSR (and thus PGIE) */
CSR = old_csr | 1 ;/* Enable interrupts */
/* Interrupt service code goes here. */
/* Interrupts may occur while this code executes */
CSR = CSR & −2 ;/* Disable interrupts */
CSR = old_csr ;/* Restore CSR (and thus PGIE) */
IRP = old_irp ;/* Restore IRP */
}
5.6.3 Manual Interrupt Processing
You can poll the IFR and IER to detect interrupts manually and then branch to
the value held in the ISTP as shown below in Example 5−14.
The code sequence begins by copying the address of the highest priority inter-
rupt from the ISTP to the register B2. The next instruction extracts the number
of the interrupt, which is used later to clear the interrupt. The branch to the
interrupt service routine comes next with a parallel instruction to set up the ICR
word.
The last five instructions fill the delay slots of the branch. First, the 32-bit return
address is stored in the B2 register and then copied to the interrupt return
pointer (IRP). Finally, the number of the highest priority interrupt, stored in B1,
is used to shift the ICR word in B1 to clear the interrupt.
Example 5−14. Manual Interrupt Processing
MVC ISTP,B2 ; get related ISFP address
EXTU B2,23,27,B1 ; extract HPEINT
[B1] B B2 ; branch to interrupt
|| [B1] MVK 1,A0 ; setup ICR word
[B1] MVK RET_ADR,B2 ; create return address
[B1] MVKH RET_ADR,B2 ;
[B1] MVC B2,IRP ; save return address
[B1] SHL A0,B1,B1 ; create ICR word
[B1] MVC B1,ICR ; clear interrupt flag
RET_ADR: (Post interrupt service routine Code)