Texas Instruments MSC1210 - Manual (Page 127)

Tone Generator
11-3
Pulse Width Modulator/Tone Generator
The three bits that together make up TPCNTL, control the function of the PWM/
tone generator. The function of the generator is determined according to the
table above.
TPCNTL.0 enables or disables the PWM/tone generator. If set to ‘1’, the block
will act as either a PWM or tone generator depending on the setting of
TPCNTL.1. When TPCNTL.0 is ‘0’, the function block is completely disabled.
This state of the block is the default state.
When TPCNTL.1 is 0, the block acts as a pulse width modulator in which a
modulated pulse is generated whose duty cycle is determined by the PWM
Duty and PWM Period registers. The range of frequencies that can be
generated is 4kHz to 500kHz with a 1MHz clock, or up to 16MHz with sysclock.
When TPCNTL.1 is 1, the block acts as a tone generator which may generate
either a staircase or square waveform, depending on further configuration. In
either case, the frequency range is 60Hz to 16MHz.
11.2 Tone Generator
When TPCNTL [1:0] = 11, the block functions as a tone generator with either a
square or staircase waveform that has two or three levels of 0V, high impedance,
and V
DD
volts, respectively. The widths of each step in the staircase waveform
are chosen so that the error between the staircase waveform and a sinusoidal
waveform of the same frequency is minimized; in staircase mode, the output is
high impedance for the last 1/4 of each half period.
ToneFrequency +
1
2 @ PWMPeriod[15 : 0] @ T
BASE
Where:
T
BASE
= T
CLK
when SPDSEL = 1
T
BASE
= T
USEC
when SPDSEL = 0.
The TONE/PWM output pin is fed to a circuit depending upon the application.
In the Figure 11−2, the circuit of a tone generator is shown. When the output
is high-impedance, the voltage value that is buffered and fed to the speaker
is V
DD
/2.
Figure 11−2. Tone Generator Circuit