Texas Instruments MSC1210 - Manual (Page 47)

SFR Definitions
3-11
Special Function Registers (SFRs)
SCON1 (Serial Control 1, Address C0
H
, Bit-Addressable): This SFR is
used to configure the behavior of the MSC1210 secondary onboard serial port.
SCON1 controls the baud rate of the serial port, whether the serial port is acti-
vated to receive data, and also contains flags that are set when a byte is suc-
cessfully sent or received.
SBUF1 (Serial Buffer 1, Address C1
H
): This SFR is used to send and receive
data via the secondary onboard serial port. Any value written to SBUF1 will be
sent out the serial port TXD1 pin. Likewise, any value that the MSC1210
receives via the serial port RXD1 pin will be delivered to the user program via
SBUF1. In other words, SBUF1 serves as the output port when written to, and
as an input port when read from.
EWU (Enable Wake−up, Address C6
H
): The EWU SFR controls under what
conditions the MSC1210 will wake up from idle mode: external 1 interrupt, ex-
ternal 0 interrupt, and watchdog interrupt. Idle wakeup from Auxint is con-
trolled via EAI bit of EICON SFR.
PSW (Program Status Word, Address D0
H
, Bit-Addressable): This SFR is
used to store a number of important bits that are set and cleared by instruc-
tions. The PSW SFR contains the carry flag, the auxiliary carry flag, the over-
flow flag, and the parity flag. Additionally, the PSW SFR contains the register
bank select flags that are used to select which of the R register banks are cur-
rently selected.
Note:
When writing an interrupt handler routine, it is a very good idea to always
save the PSW SFR on the stack and restore it when the interrupt is complete.
Many instructions modify the bits of the PSW. If the interrupt routine does not
ensure that the PSW is the same upon exit as it was upon entry, the program
is bound to behave rather erratically and unpredictably, and it will be tricky
to debug because the behavior may not make any sense.
OCL/OCM/OCH (Offset Calibration Low/Middle/High Byte, Addresses
D1
H
/D2
H
/D3
H
): These three SFRs make up a 24-bit value that sets the ADC
offset calibration.
GCL/GCM/GCH (Gain Low/Middle/High Byte, Addresses D4
H
/D5
H
/D6
H
):
These three SFRs make up a 24-bit value that sets ADC gain calibration.
ADMUX (ADC Multiplexer Register, Address D7
H
): This SFR selects the
positive input for the ADC and/or selects the temperature sensor option.
EICON (Enable Interrupt Control, Address D8
H
, Bit-Addressable): This
SFR controls whether or not the additional interrupts provided by the MSC1210
will cause an interrupt to occur when their corresponding conditions are en-
abled.
ADRESL/ADRESM/ADRESH (ADC Conversion Results, Addresses
D9
H
/DA
H
/DB
H
): These three SFRs make up a 24−bit value which holds the re-
sults of an ADC conversion.