Texas Instruments MSC1210 - Manual (Page 40)

Bit−Addressable SFRs
3-4
3.3 Bit−Addressable SFRs
All SFRs that have addresses divisible by eight (i.e., 80
H
, 88
H
, 90
H
, 98
H
, etc.)
are bit-addressable. This means that individual bits of these SFRs can be set
or cleared using the SETB and CLR instruction.
Note:
The SFRs whose names appear BOLD in Table 3−1 are SFRs that may be
accessed via bit operations; these also happen to be the first column of SFRs
on the left side of the chart. The other SFRs cannot be accessed using bit
operations such as SETB or CLR.
3.4 SFR Types
Four of the SFRs are related to the I/O ports. The MSC1210 has four I/O ports
of eight bits, for a total of 32 I/O lines. Whether a given I/O line is high or low,
and the value read from the line, is controlled by these SFRs. Refer to Section
15.1 for the detailed control of the port usages.
SFRs control the operation or the configuration of the MSC1210. For example,
TCON controls the timers and SCON controls the serial port.
The remaining SFRs can be thought of as auxiliary SFRs, in the sense that
they do not directly configure the MSC1210, but obviously the MSC1210 can-
not operate without them. For example, once the serial port has been config-
ured using SCON0, the program can read or write to the serial port using the
SBUF0 register.