Texas Instruments MSC1210 User Manual
Page 34
Internal RAM
2-8
But watch out! As the memory map shows, the MSC1210 has four distinct register
banks. When the MSC1210 is first reset, register bank 0 (addresses 00
H
through
07
H
) is used by default. However, the MSC1210 may be instructed to use one
of the alternate register banks (i.e., register banks 1, 2, or 3). In this case, R4 will
no longer be the same as internal RAM address 04
H
. For example, if the program
instructs the 8052 to use register bank 1, register R4 is now synonymous with
internal RAM address 0C
H
. If register bank 2 is selected, R4 is synonymous with
14
H
, and if register bank 3 is selected, it is synonymous with address 1C
H
.
The concept of register banks adds a great level of flexibility to the 8052, espe-
cially when dealing with interrupts (see chapter 10, Interrupts, for details).
However, always remember that the register banks really reside in the first 32
bytes of internal RAM.
Note:
If only the first register bank (i.e. bank 0) is used, internal RAM locations 08
H
through 1F
H
can be used by the program for its own use. If register banks
1, 2, or 3 are to be used, be very careful about using addresses below 20H
to avoid overwriting the value of “R” registers from other register banks.
2.4.3
Bit Memory
The MSC1210, being a communications and control-oriented microcontroller
that often has to deal with on and off situations, gives you the ability to access
a number of bit variables directly with simple instructions to set, clear, and
compare these bits. These variables may be either 1 or 0.
There are 128 bit variables available to the user, numbered 00
H
through 7F
H
.
The user may make use of these variables with commands such as SETB and
CLR. For example, to set bit number 24
H
(hex) to 1, the user would execute
the instruction:
SETB 24h
It is important to note that Bit memory, like the register banks in section 2.4.2,
is really a part of internal RAM. In fact, the 128-bit variables occupy the 16 by-
tes of internal RAM from 20
H
through 2F
H
. Thus, if the value FF
H
is written to
internal RAM address 20
H,
bits 00
H
through 07
H
have been effectively set.
That is to say that the instruction:
MOV 20h,#0FFh
is equivalent to the instructions:
SETB 00h
SETB 01h
SETB 02h
SETB 03h
SETB 04h
SETB 05h
SETB 06h
SETB 07h