Texas Instruments MSC1210 - Manual (Page 182)

Watchdog Timer
14-8
14.3.4 Disabling Watchdog Timer
Once the watchdog timer is activated, it operates continuously and your pro-
gram must reset the watchdog timer regularly, as described in the previous
section.
If, for some reason, you need to disable the watchdog timer (e.g., before enter-
ing idle mode), write a 1 and then a 0 to the DWDT (WDTCON.6) bit. In code,
this can be accomplished with:
WDTCON |= 0x40; // Set DWDT, other bits unaffected
WDTCON &= ~0x40; // Clear RWDT—watchdog disabled
The watchdog is then disabled until it is subsequently re−enabled using the
process in section 14.3.2.
14.3.5 Watchdog Timeout/Activation
If the watchdog is not reset by sending the reset sequence described
previously before the watchdog counter expires, the watchdog will be
activated. The watchdog will either reset the MSC1210 or trigger a watchdog
interrupt, depending on the setting of the HCR0 hardware configuration
register.
14.3.5.1 Watchdog Reset
In the case of a watchdog reset, the MSC1210 is reset. SFRs will assume their
default values, the stack is reset, and the program starts executing again at
address 0000
H
. The contents of RAM is not affected.
14.3.5.2 Watchdog Interrupt
If the HCR0 register is configured to cause a watchdog interrupt, a watchdog
auxiliary interrupt is flagged in the watchdog timer interrupt, WDTI (EICON.3).
If the watchdog interrupt is enabled in EWDI (EIE.4) and interrupts are enabled
via EA (IE.7), a watchdog interrupt is triggered and vectors to 0063
H
. Your
program must clear the WDTI flag before exiting the interrupt or the watchdog
interrupt will be triggered again.
Note:
If the MSC1210 is in Idle mode when the watchdog interrupt is triggered, the
processor will only wake up from idle mode if EWUWDT (EWU.2) is set. See
section 10.9, Waking Up from Idle Mode, for additional details.