Texas Instruments MSC1210 User Manual

Page 45

Advertising
background image

SFR Definitions

3-9

Special Function Registers (SFRs)

SPIRCON (SPI Receive Control, Address 9C

H

): This SFR is dual-purpose:

when read, it will return the number of bytes currently in the SPI receive buffer;
when written, it can be used to clear the receive buffer and/or indicate how
many characters should accumulate in the receive buffer before triggering an
SPI interrupt.

SPITCON (SPI Transmit Control, Address 9D

H

): This SFR, like SPIRCON,

is dual-purpose: when read, it will return the number of bytes currently in the
SPI transmit buffer; when written, it can be used to clear the transmit buffer
and/or configure whether the SCLK driver is enabled (when in master mode).

SPISTART (SPI Buffer Start Address, Address 9E

H

): This SFR indicates where

the SPI buffer begins. A value of between 128 and 255 must be written to this SFR,
and the buffer is situated in internal RAM in the upper 128 bytes.

SPIEND (SPI Buffer End Address, Address 9F

H

): This SFR indicates where

the SPI buffer ends. It must be a value between 128 and 255, and must be larg-
er than SPISTART.

P2 (Port 2, Address A0

H

, Bit-Addressable): This is input/output port 2. Each

bit of this SFR corresponds to one of the pins on the microcontroller. For exam-
ple, bit 0 of port 2 is pin P2.0, bit 7 is pin P2.7. Writing a value of 1 to a bit of
this SFR will set a high level on the corresponding I/O pin, whereas a value of
0 will bring it to a low level.

Note:

Even though the MSC1210 has four I/O ports (P0, P1, P2, and P3), if the
hardware uses external RAM or external code memory (i.e., the program is
stored in an external ROM or EPROM chip, or if external RAM chips are
being used), P0, P2, P3.6, or P3.7 may not used. This is because the
MSC1210 uses ports P0 and P2 to address the external memory. Thus, if
external RAM or code memory is being used, only P1 and P3 (except P3.6
and P3.7) are available to the application for I/O.

PWMCON (PWM Control, Address A1

H

): This SFR controls the PWM that

can be generated automatically by the MSC1210.

PWMLOW/PWMHIGH (PWM Low/High-Byte, Addresses A2

H

/A3

H

): This

SFR works together with the PWMCON SFR to determine the length and
shape of the PWM. This SFR contains the low byte.

PAI (Pending Auxiliary Interrupt, Address A5

H

): This SFR contains infor-

mation regarding which of the various possible conditions triggered an auxilia-
ry interrupt. This SFR is normally used by the ISR to determine the highest
priority pending auxiliary interrupt.

AIE (Auxiliary Interrupt Enable, Address A6

H

): This SFR enables and

disables the various interrupts that were described in the previous paragraph
regarding PAI. The interrupts mentioned in PAI will only be triggered if they are
enabled in this SFR and if EAI (in EICON) is enabled. When read, the AIE SFR
provides the status of the interrupt, regardless of the state of the EAI bit.

Advertising