Texas Instruments MSC1210 - Manual (Page 155)

Summation/Shifter Register
12-19
Analog-to-Digital Converter
12.13.3 Manual Shift (Divide) Mode
The manual shift/divide mode provides a quick method of dividing the 32-bit
number in the summation register by the value indicated by the SHF bits in
SSCON. In assembly language terminology, this performs a 32-bit rotate right,
dropping any bits shifted out of the least significant bit position.
For example, assuming the summation register currently holds the value
0x01516612, the following code will divide it by 8:
SSCON = 0x82; // Manual shift mode, divide by 8 (shift by 3)
SUM = (SUMR3 << 24) + (SUMR2 << 16) + (SUMR1 << 8) + SUMR0;
12.13.4 ADC Summation with Shift (Divide) Mode
The ADC summation with shift (divide) mode is a combination of ADC summa-
tion mode and manual shift mode. This mode will sum the number of ADC sam-
ples indicated by the CNT bits of SSCON, and then shift the final result to the
right (divide) by the number of bits indicated by the SHF bits. This mode is use-
ful when calculating the average of a number of ADC samples.
For example, to calculate the average of 16 ADC samples, the following code
could be used (assuming the ADC had previously been correctly configured):
SSCON = 0x00; // Clear summation register, manual summation
SSCON = 0xDB; // ADC sum/shift, 16 ADC samples, divide by 16
while(! (AISTAT & 0x40)); // Wait for 16 samples to be added
SUM = (SUMR3 << 24) + (SUMR2 << 16) + (SUMR1 << 8) + SUMR0;
The previous code will clear the summation register, obtain 16 samples from
the ADC, and then divide by 16, effectively calculating the average of the 16
samples.