Texas Instruments MSC1210 User Manual

Page 259

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Ports

17-31

Keil Simulator

17.10 Ports

There are four parallel I/O ports on this device, Port 0, Port 1, Port 2 and Port
3, and as such, there are four separate parallel port displays. We shall discuss
the operation of just one I/O port display because all four of them are similar.

The Parallel Port 0 shown in Figure 17−14 depicts the value and the bit pattern
of the contents on the Port 0 register (P0), the Port 0 Data Direction High register
P0DDRH, and the Port 0 Data Direction Low register P0DDRL. In addition, the
byte value and the bit pattern of the logic levels of the signals on the Port 0 I/O
pins are also depicted. The value of any of these registers or I/O pin settings can
be changed by changing either the corresponding byte value or bit pattern.

Figure 17−14. Parallel Port 0 Contents Display Window

For example, the bit pattern for P0DDRH could have been set either by writing
a value of 0x55 into the editable text input window for P0DDRH, or clicking
once on checked bit pattern toggle switches for bits 7, 5, 3, and 1, in any se-
quence. This, by the way, sets the Port 0 pins as inputs for port pins 0, 1, 2 and
3, and strong driver outputs for pins 4, 5, 6 and 7. Byte values of 0x55 and 0xFF
could just as well have been written into the P0DDRH and P0DDRL registers
respectively, through the software program, for the same effect.

Until a port read is performed, the value in the port register (P0 for instance) does
not necessarily reflect the status of the port pins.

The Keil Simulator also has facilities for error detection and warning. If, for instance,
we configure the upper nibble of Port 0 for inputs and the lower nibble for outputs,
trying to toggle the INT1 pin (P3.3) in order to simulate an interrupt trigger results
in an error message, as shown in Figure 17−15). This is because pin #3 of the Port
0 is configured for output, and we are trying to drive it as an input.

Figure 17−15. Error Message

Sample routines of the I/O Port Peripheral module have been incorporated into
sample programs for other peripheral modules that have been discussed earli-
er. Please study those programs for more information.

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