Texas Instruments MSC1210 - Manual (Page 260)

Serial Peripheral Interface (SPI)
17-32
17.11 Serial Peripheral Interface (SPI)
The serial peripheral interface (SPI) implemented in this simulator package
mimics the behavior and characteristics of a data memory access (DMA) SPI
module, integrated into the MSC1210. The MSC1210 SPI module is an en-
hanced version of the popular SPI modules implemented by other manufactur-
ers. Its enhancement involves substituting the single buffering on the transmit
and receive ends with an adjustable depth First in first out (FIFO) circular buffer
system which has all the signaling characteristics and observes all the data
collection protocols of a typical DMA system. With this DMA enhancement, un-
der normal operating conditions, if the SPI circular buffer is deep enough, the
likelihood of a data overflow is virtually eliminated.
The snapshot in Figure 17−16 shows the freeze-framed picture of the SPI
peripheral window in the middle of a typical data communication
transmit/receive session.
Figure 17−16. SPI Peripheral Window
Like the other peripheral modules, pertinent SFRs could be programmed or
updated by writing the appropriate data into the associated editable text win-
dow, or by placing or removing check marks from corresponding check boxes.
SFR names and individual bit names are also preserved between the actual
MSC1210 SPI module and the simulator SPI peripheral module.
Entries made into the editable SPICON text window will set or clear the check
marks of the SPI enable (SPIEN), master (MSMODE), clock polarity (CPOL),
clock phase (CPHA), bit order (ORDER) check boxes, and the corresponding
divide by selection from the Clock Rate selection window. Conversely, clearing
or setting the check mark on any of the check boxes, will change the value of