Texas Instruments MSC1210 - Manual (Page 43)

SFR Definitions
3-7
Special Function Registers (SFRs)
TMOD (Timer Mode, Address 89
H
): This SFR is used to configure the mode
of operation of each of the two timers. Using this SFR, the program may config-
ure each timer to be a 16-bit timer, an 8-bit auto-reload timer, a 13-bit timer,
or two separate timers. Additionally, the timers may be configured to only count
when an external pin is activated or to count events that are indicated on an
external pin.
TL0/TH0 (Timer 0 Low/High, Addresses 8A
H
/8B
H
): These two SFRs, taken
together, represent timer 0. Their exact behavior depends on how the timer is
configured in the TMOD SFR, however, these timers always count up. How
and when they increment in value is configurable.
TL1/TH1 (Timer 1 Low/High, Addresses 8C
H
/8D
H
): These two SFRs, taken
together, represent timer 1. Their exact behavior depends on how the timer is
configured in the TMOD SFR, however, these timers always count up. How
and when they increment in value is configurable.
CKCON (Clock Control, Address 8E
H
): This SFR is used by the MSC1210
to provide you with a number of timing controls that allow the MSC1210 to mim-
ic standard 8052 timing, or to fully exploit the high-speed nature of the
MSC1210. This SFR allows timers 0, 1, and 2 to be clocked at a rate of 1/12th
the crystal frequency (just like an 8052), or to be clocked at the rate of 1/4th
the crystal frequency such that the clocks will be incremented once every in-
struction cycle. Additionally, the CKCON SFR allows you to modify how long
the MSC1210 takes to access external data memory.
MWS (Memory Write Select, Address 8F
H
): This SFR contains a single bit
(bit 0) that enables writing to program flash memory. If this bit is clear, MOVX
@DPTR or MOVX @Ri write to data flash memory or data SRAM memory. If
this bit is set, MOVX @DPTR or MOVX @Ri write to program flash memory.
TL2/TH2 (Timer 2 Low/High, Addresses CC
H
/CD
H
): These two SFRs, taken
together, represent timer 2. Their exact behavior depends on how the timer is
configured in the T2CON SFR.
RCAP2L/RCAP2H (Timer 2 Capture Low/High, Addresses CA
H
/CB
H
):
These two SFRs, taken together, represent the timer 2 capture register. It may
be used as a reload value for timer 2, or to capture the value of timer 2 under
certain circumstances. The exact purpose and function of these two SFRs de-
pends on the configuration of T2CON.
P1 (Port 1, Address 90
H
, Bit−Addressable): This is input/output port 1. Each
bit of this SFR corresponds to one of the pins on the microcontroller. For exam-
ple, bit 0 of port 1 is pin P1.0, bit 7 is pin P1.7. Writing a value of 1 to a bit of
this SFR will set a high level on the corresponding I/O pin, whereas a value of
0 will bring it to a low level.
EXIF (External Interrupt Flag, Address 91
H
): This SFR contains the inter-
rupt trigger flags for external interrupts 2 through 5. When these bits are set,
the corresponding interrupt will be triggered, as long as that interrupt is en-
abled.