FUJITSU MB91460 SERIES FR60 - Manual (Page 302)

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Chapter 21 Hardware Watchdog Timer
3.Register
3.2 Hardware watchdog timer duration register
Hardware watchdog timer duration register (elongation of the trigger duration).
• HWWDE: Address 04C6h (Access: Byte)
(See “ Meaning of Bit Attribute Symbols (Page No.10) ” for details of the attributes.)
• Bit7-2: Reserved bits. Always write “0” to these bits.
• Bit1-0: ED (Elongate watchdog duration).
*) This setting is not available on MB91V460.
7 6 5 4 3 2 1 0 bit
- - - - - - ED1 ED0
- - - - - - 0 0
Initial value ( INIT pin input,
watchdog reset )
- - - - - - 0 0
Initial value
(Software reset)
RX/W0 RX/W0 RX/W0 RX/W0 RX/W0 RX/W0 R/W R/W Attribute
ED1-0 Function
00 The watchdog period is 2^16 RC clock cycles [initial setting]
01 The watchdog period is 2^17 RC clock cycles *)
10 The watchdog period is 2^18 RC clock cycles *)
11 The watchdog period is 2^19 RC clock cycles *)