FUJITSU MB91460 SERIES FR60 User Manual

Page 93

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77

Chapter 3 MB91460 Series Basic Information

3.Interrupt Vector Table

Table 3-1 Interrupt Vector Table

Notes:

*1

The ICRs are located in the interrupt controller and set the interrupt level for each interrupt request. An ICR is

provided for each interrupt request.

*2

The vector address for each EIT (exception, interrupt or trap) is calculated by adding the listed offset to the table

base register value (TBR). The TBR specifies the top of the EIT vector table. The addresses listed in the table are
for the default TBR value (0x000FFC00). The TBR is initialized to this value by a reset. After execution of the inter-
nal boot ROM TBR is set to 0x000FFC00.

*3

Used by REALOS

*4

ICR23 and ICR47 can be exchanged by setting the REALOS compatibility bit (addr 0x0C03 : IOS[0])

*5

System reserved

*6

Memory Protection Unit (MPU) support

*7

Only for MB91V460. Please see

Chapter 53 Fixed Mode-Reset Vector / BOOT-ROM (Page No.983)

for boot

security vectors used on flash devices.

*8

RN resource number used for DMA operation. No number means that this resource interrupt cannot be used to

trigger a DMA transfer.

Prog. Pulse Gen. 14

126

7E

ICR55

0x477

0x204

0x000FFE04

110

Prog. Pulse Gen. 15

127

7F

0x200

0x000FFE00

111

Up/Down Counter 0

128

80

ICR56

0x478

0x1FC

0x000FFDFC

Up/Down Counter 1

129

81

0x1F8

0x000FFDF8

Up/Down Counter 2

130

82

ICR57

0x479

0x1F4

0x000FFDF4

Up/Down Counter 3

131

83

0x1F0

0x000FFDF0

Real Time Clock

132

84

ICR58

0x47A

0x1EC

0x000FFDEC

Calibration Unit

133

85

0x1E8

0x000FFDE8

A/D Converter 0

134

86

ICR59

0x47B

0x1E4

0x000FFDE4

14, 112

-

135

87

0x1E0

0x000FFDE0

Alarm Comparator 0

136

88

ICR60

0x47C

0x1DC

0x000FFDDC

Alarm Comparator 1

137

89

0x1D8

0x000FFDD8

Low Voltage Detection

138

8A

ICR61

0x47D

0x1D4

0x000FFDD4

-

139

8B

0x1D0

0x000FFDD0

Timebase Overflow

140

8C

ICR62

0x47E

0x1CC

0x000FFDCC

PLL Clock Gear

141

8D

0x1C8

0x000FFDC8

DMA Controller

142

8E

ICR63

0x47F

0x1C4

0x000FFDC4

Main/Sub OSC stability wait

143

8F

0x1C0

0x000FFDC0

Boot Security vector

*7

144

90

-

-

0x1BC

0x000FFDBC

Used by the INT
instruction.

145
to
255

91
to
FF

-

-

0x1B8
to
0x000

0x000FFDB8
to
0x000FFC00

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