Rockwell Automation 1746-HSCE,D17466.5 High-Speed Counter Module User Manual

Page 153

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Publication 1746-UM006B-EN-P - August 2005

Specifications A-3

Z input reset response time.
Reset to a value other than zero
(0)

The time required for the module to respond to an external Z input
event and reset the pulse counter to a value other than 0.

500 µs

(3)

Limit switch reset response time.
Reset to zero (0)

The time required for the module to respond to an external limit
switch event and reset the pulse counter to 0.

1.0 ms with 300 µs filter

(3)

15.0 ms with 10 ms filter

(3)

Limit switch reset response time.
Reset to a value other than zero
(0)

The time required for the module to respond to an external limit
switch event and reset the pulse counter to a value other than 0.

1.0 ms with 300 µs filter

(3)

15.5 ms with 10 ms filter

(3)

Soft Reset response time (to 0 or
value other than 0)

The time required for the module to respond to a soft reset event
(i.e. issued from the user program) and reset the pulse counter to 0
or a value other than 0.

Sequencer: 40 ms

(3)

Range: 55 ms

(3)

Rate: 35 ms

(4)

Counter Hold response time

The time required for the module to respond to a Counter Hold
command issued from the user program.

Sequencer: 35 ms
Range: 50 ms
Rate: 35 ms

(4)

Count Direction response time
via user program

The time required for the module to respond to an Up/Down Count
Direction change issued from the user program.

Sequencer: 40 ms
Range: 55 ms
Rate: 35 ms

Dynamic Parameter response
time (worst case)

The amount of time (worst case) the module needs to reconfigure
data after its Dynamic Parameters have been changed (i.e. time to
accept Preset change).

Sequencer: 110 ms
Range: 110 ms
Rate: 65 ms

Module set up time (worst case)

The time (worst case) required for the module to respond to counts
received after the false to true transition of the Function Control
bit.

Sequencer: 200 ms
Range: 200 ms
Rate: 200 ms

Minimum time between resets
via Z input

The minimum time between Z input resets to ensure a reset
response.

Sequencer: 2.0 ms
Range: 3.5 ms

Minimum time between resets
via limit switch with 300 µs filter

The minimum time between limit switch resets required to ensure
a reset response using the 300 µs filter.

Sequencer: 2.0 ms
Range: 3.5 ms

Minimum time between resets
via limit switch with 10 ms filter

The minimum time between limit switch resets required to ensure
a reset response using the 10 ms filter.

Sequencer: 14.0 ms
Range: 17.5 ms

Interrupt latency delay time

(1)

(other modules)

Altering the state of the slot enable bit in the processor status file
could increase the interrupt service time of the module generating
the interrupt an additional 17.4 ms

17.4 ms increase

(1) Currently no modules are available that generate interrupts.

(2) Excluding SLC scan time.

(3) If counts occur at the module’s inputs during a reset, they may be lost for the amount of time equal to the reset response time.

(4) Rate counter not affected.

Operation

Description

Timing

(2)

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