Artesyn ATCA-9305 User's Manual (May 2014) - Manual (Page 95)

Management Complex
ATCA-9305 User’s Manual (10009109-07) 95
Table 4-2 MPC8548 Address Summary
Hex Physical Address Access Mode Register Description See Page
FFF8,0000 R/W Boot window (512 KB) –
FF80.0000 - reserved (7.5 MB)
FF70,0000 R/W MPC8548 CCSRBAR (1MB) –
FC88,0000 – reserved (46 MB)
FC80,0000 R/W Socketed flash, optional (512 KB) 99
FC48,0000 – reserved (3.5 MB)
FC40,00DC0 R/W Serial IRQ Interrupt 2 127
FC40,00D8 R/W Serial IRQ Interrupt 1 126
FC40,00D4 R/W LPC Data 126
FC40,00D0 R/W Low Pin Count (LPC) Bus Control 125
FC40,008C R/W IPMP/IPMC GPIO Control 125
FC40,0088 R/W Cavium GPIO Data Input 124
FC40,0084 R/W Cavium GPIO Data Output 123
FC40,0080 R/W Cavium GPIO Control 123
FC40,0078 R/W Altera JTAG Chain Software Control 122
FC40,0074 R/W Cavium 2 C_MUL Clock Divisor
Control 121
FC40,0070 R/W Cavium 1 C_MUL Clock Divisor
Control 120
FC40,0068 R/W RTM Control 120
FC40,0064 R/W RTM GPIO Control 119
FC40,0060 R/W RTM GPIO State 119
FC40,0054 R/W Miscellaneous Control (SIO, I2C,
Test Clock) 117
FC40,0050 R/W Boot Device Redirection 116
FC40,0040 R/W Scratch #1 -
FC40,003C R/W Reset Command Sticky #2 116
FC40,0038 R/W Reset Command Sticky #1 115