Maxim Integrated DS21Q55 User Manual
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Register Name:
ESCR
Register Description:
Elastic Store Control Register
Register Address:
4Fh
Bit #
7
6
5
4
3
2
1
0
Name
TESALGN
TESR
TESMDM
TESE
RESALGN
RESR
RESMDM
RESE
Default
0
0
0
0
0
0
0
0
Bit 0/Receive Elastic Store Enable (RESE).
0 = elastic store is bypassed
1 = elastic store is enabled
Bit 1/Receive Elastic Store Minimum Delay Mode (RESMDM). See Minimum Delay Mode.
0 = elastic stores operate at full two frame depth
1 = elastic stores operate at 32–bit depth
Bit 2/Receive Elastic Store Reset (RESR). Setting this bit from a zero to a one forces the read and write pointers into
opposite frames, maximizing the delay through the receive elastic store. Should be toggled after RSYSCLK has been applied
and is stable. See Elastic Stores Initialization for details. Do not leave this bit set HIGH.
Bit 3/Receive Elastic Store Align (RESALGN). Setting this bit from a zero to a one will force the receive elastic store’s
write/read pointers to a minimum separation of half a frame. No action will be taken if the pointer separation is already greater
or equal to half a frame. If pointer separation is less than half a frame, the command will be executed and the data will be
disrupted. Should be toggled after RSYSCLK has been applied and is stable. Must be cleared and set again for a subsequent
align. See Elastic Stores Initialization for details.
Bit 4/Transmit Elastic Store Enable (TESE).
0 = elastic store is bypassed
1 = elastic store is enabled
Bit 5/Transmit Elastic Store Minimum Delay Mode (TESMDM). See Minimum Delay Mode for details .
0 = elastic stores operate at full two frame depth
1 = elastic stores operate at 32-bit depth
Bit 6/Transmit Elastic Store Reset (TESR). Setting this bit from a zero to a one forces the read and write pointers into
opposite frames, maximizing the delay through the transmit elastic store. Transmit data is lost during the reset. Should be
toggled after TSYSCLK has been applied and is stable. See Elastic Stores Initialization for details. Do not leave this bit set
HIGH.
Bit 7/Transmit Elastic Store Align (TESALGN). Setting this bit from a zero to a one will force the transmit elastic store’s
write/read pointers to a minimum separation of half a frame. No action will be taken if the pointer separation is already greater
or equal to half a frame. If pointer separation is less than half a frame, the command will be executed and the data will be
disrupted. Should be toggled after TSYSCLK has been applied and is stable. Must be cleared and set again for a subsequent
align. See Elastic Stores Initialization for details.