Parallel port, Register map, Register map sorted by address table 6 -1 – Maxim Integrated DS21Q55 User Manual

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4. PARALLEL PORT

The DS21Q55 is controlled via a nonmultiplexed (MUX = 0) or a multiplexed (MUX = 1) bus by an
external microcontroller or microprocessor. The DS21Q55 can operate with either Intel or Motorola bus
timing configurations. If the BTS pin is tied low, Intel timing will be selected; if tied high, Motorola
timing will be selected. All Motorola bus signals are listed in parenthesis (). See the timing diagrams in
the AC Electrical Characteristics for more details. Each of the four transceivers has a complete register
set as shown below. There are four individual Chip Select signals (CS1*, CS2*, CS3*, CS4*) that are
used select one of the four transceivers.

4.1

Register Map

REGISTER MAP SORTED BY ADDRESS Table 6 -1

ADDRESS

R/W

REGISTER NAME

REGISTER

ABBREVIATION

PAGE

00

MASTER MODE REGISTER

MSTRREG

*

01

I/O Configuration Register 1

IOCR1

*

02

I/O Configuration Register 2

IOCR2

*

03

T1 Receive Control Register 1

T1RCR1

*

04

T1 Receive Control Register 2

T1RCR2

*

05

T1 Transmit Control Register 1

T1TCR1

*

06

T1 Transmit Control Register 2

T1TCR2

*

07

T1 Common Control Register 1

T1CCR1

*

08

Software Signaling Insertion Enable 1

SSIE1

*

09

Software Signaling Insertion Enable 2

SSIE2

*

0A

Software Signaling Insertion Enable 3

SSIE3

*

0B

Software Signaling Insertion Enable 4

SSIE4

*

0C

T1 Receive Digital Milliwatt Enable Register 1

T1RDMR1

*

0D

T1 Receive Digital Milliwatt Enable Register 2

T1RDMR2

*

0E

T1 Receive Digital Milliwatt Enable Register 3

T1RDMR3

*

0F

Device Identification Register

IDR

*

10

Information Register 1

INFO1

*

11

Information Register 2

INFO2

*

12

Information Register 3

INFO3

*

13

Test Register

TEST

*

14

Interrupt Information Register 1

IIR1

*

15

Interrupt Information Register 2

IIR2

*

16

Status Register 1

SR1

*

17

Interrupt Mask Register 1

IMR1

*

18

Status Register 2

SR2

*

19

Interrupt Mask Register 2

IMR2

*

1A

Status Register 3

SR3

*

1B

Interrupt Mask Register 3

IMR3

*

1C

Status Register 4

SR4

*

1D

Interrupt Mask Register 4

IMR4

*

1E

Status Register 5

SR5

*

1F

Interrupt Mask Register 5

IMR5

*

20

Status Register 6

SR6

*

21

Interrupt Mask Register 6

IMR6

*

22

Status Register 7

SR7

*

23

Interrupt Mask Register 7

IMR7

*

24

Status Register 8

SR8

*

25

Interrupt Mask Register 8

IMR8

*

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