Motorola ColdFire MCF5281 - Manual (Page 126)

ColdFire Flash Module (CFM)
6-14 Freescale Semiconductor
6.3.4.6 CFM Data Access Register (CFMDACC)
The CFMDACC specifies the data/program access permissions of Flash logical sectors.
Table 6-8. CFMSACC Field Descriptions
Bits Name Description
31–0 SUPV[31:0] Supervisor address space assignment. The SUPV[31:0] bits are always readable
and only writable when LOCK = 0. Each Flash logical sector can be mapped into
supervisor or unrestricted address space. CFMSACC uses the same
correspondence between logical sectors and register bits as does CFMPROT. See
Figure 6-8 for details.
When a logical sector is mapped into supervisor address space, only CPU
supervisor accesses will be allowed. A CPU user access to a location in supervisor
address space will result in a cycle termination transfer error. When a logical sector
is mapped into unrestricted address space both supervisor and user accesses are
allowed.
1 Logical sector is mapped in supervisor address space.
0 Logical sector is mapped in unrestricted address space.
31 16
Field DATA
Reset See Note
R/W R/W
15 0
Field DATA
Reset See Note
R/W R/W
Address IPSBAR + 0x1D_0018
Note: The CFMPROT register is loaded at reset from the Flash Program/Data Space Restrictions longword
stored at the array base address + 0x0000_0410.
Figure 6-10. CFM Data Access Register (CFMDACC)
Table 6-9. CFMDACC Field Descriptions
Bits Name Description
31–0 DATA[31:0] Data address space assignment. The DATA[31:0] bits are always readable and only
writable when LOCK = 0. Each Flash logical sector can be mapped into data or
both data and program address space. CFMDACC uses the same correspondence
between logical sectors and register bits as does CFMPROT. See
Figure 6-8 for
details.
When a logical sector is mapped into data address space, only CPU data accesses
will be allowed. A CPU program access to a location in data address space will
result in a cycle termination transfer error. When an array sector is mapped into
both data and program address space both data and program accesses are
allowed.
1 Logical sector is mapped in data address space.
0 Logical sector is mapped in data and program address space
.
MCF5282 and MCF5216 ColdFire Microcontroller User’s Manual, Rev. 3