Motorola ColdFire MCF5281 - Manual (Page 757)

Freescale Semiconductor Index-9
low-power control (LPCR) 7-4
low-power interrupt control (LPICR) 7-2
Prescaler divide (PRESDIV) bits 25-22
Processor status 30-2
, 30-39
Program counter 2-7
Programmable interrupt timers
operation
low-power modes 7-10
Programming model
chip configuration module 27-3
debug 30-5
EPORT 7-1
power management 7-1
Pulse accumulator
event counter mode 20-18
gated time accumulation 20-19
input interrupt 20-22
overflow interrupt 20-22
PULSE instruction 30-3
Q
QADC
A/D converter
bias 28-34
block diagram 28-32
channel decode 28-33
comparator 28-33
cycle times 28-32
multiplexer 28-33
operation 28-31
sample buffer 28-33
state machine 28-34
analog inputs 28-66
analog subsystem 28-31
analog supply
filtering 28-61
grounding 28-61
block diagram 28-2
boundary conditions 28-45
digital control subsystem 28-34
electrical characteristics
absolute maximum ratings 33-8
operating conversion specifications 33-10
operating electrical specifications 33-9
external multiplexing 28-29
operation 28-29
options 28-31
features 28-1
interrupts
operation 28-68
sources 28-68
leakage 28-67
memory map 28-6
operation
continuous-scan 28-49
externally gated 28-51
externally triggered 28-50
periodic timer 28-51
software-initiated 28-50
debug mode 28-2
disabled 28-47
low-power modes 7-11
reserved 28-47
single-scan 28-47
externally gated 28-48
externally triggered 28-48
interval timer 28-49
software-initiated 28-48
stop mode 28-3
overview 28-1
periodic/interval timer 28-52
QCLK generation 28-52
queue priority 28-34
, 28-36
registers
control 2–0 (QACRn) 28-10 – 28-14
conversion command word (CCW) 28-24 , 28-53
left-justified signed result (LJSRR) 28-27
left-justified unsigned result (LJURR) 28-28
module configuration (QADCMCR) 28-7
port data (PORTQA and PORTQB) 28-8
port QA and QB data direction (DDRQA,
DDRQB) 28-9
result word table 28-55
right-justified unsigned result (RJURR) 28-27
status 0–1 (QASRn) 28-17
, 28-23
successive approximation (SAR) 28-34
test (QADCTEST) 28-8
result coherency 28-28
stress conditions 28-62
timing diagrams
conversion in gated mode, continuous scan 28-60
conversion in gated mode, single scan 28-60
conversion timing 28-33
conversion timing, bypass mode 28-33
QSPI
baud rate 22-12
electrical characteristics
AC timing specifications 33-24
memory map 22-3
operation
low-power modes 7-8
master mode 22-2
programming example 22-15
RAM
command 22-12
MCF5282 and MCF5216 ColdFire Microcontroller User’s Manual, Rev. 3