1 extension words as required, 2 command sequence diagrams, 2 command sequence diagrams -21 – Motorola ColdFire MCF5281 User Manual

Page 639: Figure 30-15

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Debug Support

Freescale Semiconductor

30-21

Table 30-18

describes BDM fields.

30.5.3.1.1

Extension Words as Required

Some commands require extension words for addresses and/or immediate data. Addresses require two
extension words because only absolute long addressing is permitted. Longword accesses are forcibly
longword-aligned and word accesses are forcibly word-aligned. Immediate data can be 1 or 2 words long.
Byte and word data each requires a single extension word and longword data requires two extension words.

Operands and addresses are transferred most-significant word first. In the following descriptions of the
BDM command set, the optional set of extension words is defined as address, data, or operand data.

30.5.3.2

Command Sequence Diagrams

The command sequence diagram in

Figure 30-16

shows serial bus traffic for commands. Each bubble

represents a 17-bit bus transfer. The top half of each bubble indicates the data the development system
sends to the debug module; the bottom half indicates the debug module’s response to the previous
development system commands. Command and result transactions overlap to minimize latency.

15

10

9

8

7

6

5

4

3

2

0

Operation

0

R/W

Op Size

0

0

A/D

Register

Extension Word(s)

Figure 30-15. BDM Command Format

Table 30-18. BDM Field Descriptions

Bit

Name

Description

15–10

Operation Specifies the command. These values are listed in

Table 30-17

.

9

0

Reserved, should be cleared.

8

R/W

Direction of operand transfer.
0 Data is written to the CPU or to memory from the development system.
1 The transfer is from the CPU to the development system.

7–6

Op Size

Operand data size for sized operations. Addresses are expressed as 32-bit absolute values. Note
that a command performing a byte-sized memory read leaves the upper 8 bits of the response
data undefined. Referenced data is returned in the lower 8 bits of the response.

Operand Size

Bit Values

00 Byte

8 bits

01 Word

16 bits

10 Longword

32 bits

11 Reserved

5–4

00

Reserved, should be cleared.

3

A/D

Address/data. Determines whether the register field specifies a data or address register.
0 Indicates a data register.
1 Indicates an address register.

2–0

Register Contains the register number in commands that operate on processor registers.

MCF5282 and MCF5216 ColdFire Microcontroller User’s Manual, Rev. 3

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