Chapter 12 chip select module, 1 overview, 2 chip select module signals – Motorola ColdFire MCF5281 User Manual
Page 215: Chapter 12, Chip select module, 1 overview -1 12.2 chip select module signals -1
Freescale Semiconductor
12-1
Chapter 12
Chip Select Module
This chapter describes the chip select module, including the operation and programming model of the chip
select registers, which include the chip select address, mask, and control registers.
NOTE
Unless otherwise noted, in this chapter, “clock” refers to the CLKOUT used
for the bus.
12.1
Overview
The following list summarizes the key chip select features:
•
Up to seven independent, user-programmable chip select signals (CS[6:0]) that can interface with
external SRAM, PROM, EPROM, EEPROM, Flash, and peripherals
•
Address masking for 64-Kbyte to 4-Gbyte memory block sizes
12.2
Chip Select Module Signals
lists signals used by the chip select module.
shows the interaction of the byte-enable/byte-write enables with related signals.
Table 12-1. Chip Select Module Signals
Signal
Description
Chip Selects
(CS[6:0])
Each CSn can be independently programmed for an address location as well as for masking, port
size, read/write burst capability, wait-state generation, and internal/external termination. Only CS0 is
initialized at reset and may act as an external boot chip select to allow boot ROM to be at an external
address space. Port size for CS0 is configured by the logic levels of D[19:18] when RSTO negates
and RCON is asserted.
Output Enable
(OE)
Interfaces to memory or to peripheral devices and enables a read transfer. It is asserted and negated
on the falling edge of the clock. OE is asserted only when one of the chip selects matches for the
current address decode.
Byte Strobes
BS[3:0]
These signals are individually programmed through the byte-enable mode bit, CSCRn[BEM],
described in
Section 12.4.1.3, “Chip Select Control Registers (CSCR0–CSCR6)
These generated signals provide byte data select signals, which are decoded from the transfer size,
A1, and A0 signals in addition to the programmed port size and burstability of the memory accessed,
as
shows.
MCF5282 and MCF5216 ColdFire Microcontroller User’s Manual, Rev. 3