5 phase lock loop electrical specifications, 5 phase lock loop electrical specifications -7, Refer to – Motorola ColdFire MCF5281 User Manual

Page 691: Table 33-8, Throug

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Electrical Characteristics

Freescale Semiconductor

33-7

33.5

Phase Lock Loop Electrical Specifications

Table 33-8. PLL Electrical Specifications

(V

DD

and V

DDPLL

= 2.7 to 3.6 V, V

SS

= V

SSPLL

= 0 V)

Characteristic

Symbol

Min

Max

Unit

66MHz

80MHz

PLL Reference Frequency Range

Crystal reference
External reference
1:1 Mode

f

ref_crystal

f

ref_ext

f

ref_1:1

2
2

33.33

8.33
8.33

66.66

10.0
10.0

80

MHz

System Frequency

1

External Clock Mode
On-Chip PLL Frequency

1

All internal registers retain data at 0 Hz.

f

sys

0

f

ref

/ 32

f

sys(max)

66.66
66.66

f

sys(max)

80
80

MHz

Loss of Reference Frequency

2, 4

2

“Loss of Reference Frequency” is the reference frequency detected internally, which transitions the PLL into self
clocked mode.

f

LOR

100

1000

kHz

Self Clocked Mode Frequency

3, 4

3

Self clocked mode frequency is the frequency that the PLL operates at when the reference frequency falls below
f

LOR

with default MFD/RFD settings.

f

SCM

1

5

MHz

Crystal Start-up Time

4, 5

4

This parameter is characterized before qualification rather than 100% tested.

5

Proper PC board layout procedures must be followed to achieve specifications.

t

cst

10

ms

EXTAL Input High Voltage

Crystal Mode
All other modes (1:1, Bypass, External)

V

IHEXT

V

XTAL

+ 0.4

2.0

V

DD

V

DD

V

EXTAL Input Low Voltage

Crystal Mode
All other modes (1:1, Bypass, External)

V

ILEXT

V

SS

V

SS

V

XTAL

- 0.4

0.8

V

XTAL Output High Voltage

I

OH

= 1.0 mA

V

OL

V

DD

- 1.0

V

XTAL Output Low Voltage

I

OL

= 1.0 mA

V

OL

0.5

V

XTAL Load Capacitance

6

pF

PLL Lock Time

4,7

t

lpll

500

μ

s

Power-up To Lock Time

4, 5,8

With Crystal Reference
Without Crystal Reference

t

lplk


10.5

500

ms

μ

s

1:1 Clock Skew (between CLKOUT and EXTAL)

9

t

skew

-2

2

ns

Duty Cycle of reference

4

t

dc

40

60

% f

sys

Frequency un-LOCK Range

f

UL

- 1.5

1.5

% f

sys

Frequency LOCK Range

fLCK

- 0.75

0.75

% % f

sys

CLKOUT Period Jitter

4, 5, 7, 10,11

, Measured at f

SYS

Max

Peak-to-peak (Clock edge to clock edge) — MCF521x
Peak-to-peak (Clock edge to clock edge) — MCF528x
Long Term Jitter (Averaged over 2 ms interval)

C

jitter



5

10

.01

% f

sys

MCF5282 and MCF5216 ColdFire Microcontroller User’s Manual, Rev. 3

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