Motorola ColdFire MCF5281 - Manual (Page 718)

Register Memory Map
A-6 Freescale Semiconductor
IPSBAR + 0x238 (Read) Reserved 8
(Write) UART Output Port Bit Set Command Register
0
UOP10 8
IPSBAR + 0x23C (Read) Reserved 8
(Write) UART Output Port Bit Reset Command
Register 0
UIP00 8
IPSBAR + 0x240 UART Mode Registers 1
2
UMR11,
UMR21
8
IPSBAR + 0x244 (Read) UART Status Register 1 USR1 8
(Write) UART Clock Select Register 1
1
UCSR1 8
IPSBAR + 0x248 (Read) Reserved 8
(Write) UART Command Register 1 UCR1 8
IPSBAR + 0x24C (UART/Read) UART Receive Buffer 1 URB1 8
(UART/Write) UART Transmit Buffer 1 UTB1 8
IPSBAR + 0x250 (Read) UART Input Port Change Register 1 UIPCR1 8
(Write) UART Auxiliary Control Register 1 1 UACR1 8
IPSBAR + 0x254 (Read) UART Interrupt Status Register 1 UISR1 8
(Write) UART Interrupt Mask Register 1 UIMR1 8
IPSBAR + 0x258 (Read) Reserved 8
UART Baud Rate Generator Register 11 UBG11 8
IPSBAR + 0x25C (Read) Reserved 8
UART Baud Rate Generator Register 21 UBG21 8
IPSBAR + 0x274 (Read) UART Input Port Register 1 UIP1 8
(Write) Reserved 8
IPSBAR + 0x278 (Read) Reserved 8
(Write) UART Output Port Bit Set Command Register
1
UOP11 8
IPSBAR + 0x27C (Read) Reserved 8
(Write) UART Output Port Bit Reset Command
Register 1
UIP01 8
IPSBAR + 0x280 UART Mode Register 2 2 UMR12,
UMR22
8
IPSBAR + 0x284 (Read) UART Status Register 2 USR2 8
(Write) UART Clock Select Register 2
1
UCSR2 8
Table A-3. Register Memory Map (continued)
Address Name Mnemonic Size
MCF5282 and MCF5216 ColdFire Microcontroller User’s Manual, Rev. 3