17 descriptor group upper address register (gaur), 18 descriptor group lower address register (galr) – Motorola ColdFire MCF5281 User Manual
Page 331
Fast Ethernet Controller (FEC)
Freescale Semiconductor
17-21
17.4.17 Descriptor Group Upper Address Register (GAUR)
GAUR contains the upper 32 bits of the 64-bit hash table used in the address recognition process for
receive frames with a multicast address. You must initialize this register.
17.4.18 Descriptor Group Lower Address Register (GALR)
GALR contains the lower 32 bits of the 64-bit hash table used in the address recognition process for
receive frames with a multicast address. You must initialize this register.
IPSBAR
Offset:
0x111C
Access: User read/write
31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 15 14 13 12 11 10
9
8
7
6
5
4
3
2
1
0
R
IADDR2
W
Reset — — — — — — — — — — — — — — — — — — — — — — — — — — — — — — — —
Figure 17-16. Descriptor Individual Lower Address Register (IALR)
Table 17-20. IALR Field Descriptions
Field
Description
31–0
IADDR2
The lower 32 bits of the 64-bit hash table used in the address recognition process for receive frames with a unicast
address. Bit 31 of IADDR2 contains hash index bit 31. Bit 0 of IADDR2 contains hash index bit 0.
IPSBAR
Offset:
0x1120
Access: User read/write
31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 15 14 13 12 11 10
9
8
7
6
5
4
3
2
1
0
R
GADDR1
W
Reset — — — — — — — — — — — — — — — — — — — — — — — — — — — — — — — —
Figure 17-17. Descriptor Group Upper Address Register (GAUR)
Table 17-21. GAUR Field Descriptions
Field
Description
31–0
GADDR1
The GADDR1 register contains the upper 32 bits of the 64-bit hash table used in the address recognition process for
receive frames with a multicast address. Bit 31 of GADDR1 contains hash index bit 63. Bit 0 of GADDR1 contains
hash index bit 32.
IPSBAR
Offset:
0x1124
Access: User read/write
31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 15 14 13 12 11 10
9
8
7
6
5
4
3
2
1
0
R
GADDR2
W
Reset — — — — — — — — — — — — — — — — — — — — — — — — — — — — — — — —
Figure 17-18. Descriptor Group Lower Address Register (GALR)
MCF5282 and MCF5216 ColdFire Microcontroller User’s Manual, Rev. 3