Motorola ColdFire MCF5281 - Manual (Page 385)

General Purpose Timer Modules (GPTA and GPTB)
Freescale Semiconductor 20-17
20.5.19 GPT Port Data Direction Register (GPTDDR)
20.6 Functional Description
The General Purpose Timer (GPT) module is a 16-bit, 4-channel timer with input capture and output
compare functions and a pulse accumulator.
20.6.1 Prescaler
The prescaler divides the module clock by 1, 2, 4, 8, 16, 32, 64, or 128. The GPTSCR2[PR] bits select the
prescaler divisor.
20.6.2 Input Capture
Clearing an I/O select bit, IOSn, configures channel n as an input capture channel. The input capture
function captures the time at which an external event occurs. When an active edge occurs on the pin of an
input capture channel, the timer transfers the value in the GPT counter into the GPT channel registers,
GPTCn.
The minimum pulse width for the input capture input is greater than two module clocks.
The input capture function does not force data direction. The GPT port data direction register controls the
data direction of an input capture pin. Pin conditions such as rising or falling edges can trigger an input
capture only on a pin configured as an input.
An input capture on channel n sets the CnF flag. The CnI bit enables the CnF flag to generate interrupt
requests.
7 6 5 4 3 0
Field — DDRT
GPT Function — IC/OC
Pulse Accumulator Function — PAI —
Reset 0000_0000
R/W R/W
Address IPSBAR + 0x1A_001E, 0x1B_001E
Figure 20-21. GPT Port Data Direction Register (GPTDDR)
Table 20-22. GPTDDR Field Descriptions
Bit(s) Name Description
7–4 — Reserved, should be cleared.
3–0 DDRT Control the port logic of PORTTn. Reset clears the PORTTn data direction register,
configuring all GPT port pins as inputs. These bits are read anytime, write anytime.
1 Corresponding pin configured as output
0 Corresponding pin configured as input
MCF5282 and MCF5216 ColdFire Microcontroller User’s Manual, Rev. 3