Motorola ColdFire MCF5281 - Manual (Page 529)

Freescale Semiconductor 27-1
Chapter 27
Chip Configuration Module (CCM)
The chip configuration module (CCM) controls the chip configuration and operating mode.
27.1 Features
The CCM performs these operations.
• Selects the chip operating mode:
— Master mode
— Single-chip mode
• Selects external clock or phase-lock loop (PLL) mode with internal or external reference
• Selects output pad drive strength
• Selects boot device and data port size
• Selects bus monitor configuration
• Selects low-power configuration
• Selects transfer size function of the external bus
• Selects processor status (PSTAT) and processor debug data (DDATA) functions
• Selects BDM or JTAG mode
27.2 Modes of Operation
The CCM configures the chip for two modes of operation:
• Master mode
• Single-chip mode
The operating mode is determined at reset and cannot be changed thereafter.
27.2.1 Master Mode
In master mode, the central processor unit (CPU) can access external memories and peripherals. The
external bus consists of a 32-bit data bus and 24 address lines. The available bus control signals include
R/W, TS, TIP, TSIZ[1:0], TA, TEA, OE, and BS[3:0]. Up to seven chip selects can be programmed to
select and control external devices and to provide bus cycle termination. When interfacing to 16-bit ports,
the port C and D pins and PJ[5:4] (BS[1:0]) can be configured as general-purpose input/output (I/O), and
when interfacing to 8-bit ports, the ports B, C and D pins and PJ[7:5] (BS[3:1]) can be configured as
general purpose input/output (I/O).
27.2.2 Single-Chip Mode
In single-chip mode, all memory is internal to the chip. All external bus pins are configured as general
purpose I/O.
MCF5282 and MCF5216 ColdFire Microcontroller User’s Manual, Rev. 3