Motorola ColdFire MCF5281 - Manual (Page 654)

Debug Support
30-36 Freescale Semiconductor
Command Sequence:
Figure 30-38. RDMREG Command Sequence
Operand Data: None
Result Data: The contents of the selected debug register are returned as a longword value. The
data is returned most-significant word first.
30.5.3.3.12 Write Debug Module Register ( WDMREG )
The operand (longword) data is written to the specified debug module register. All 32 bits of the register
are altered by the write. DSCLK must be inactive while the debug module register writes from the CPU
accesses are performed using the WDEBUG instruction.
Command Format:
Table 30-3 shows the definition of the DRc write encoding.
Command Sequence:
Figure 30-40. WDMREG Command Sequence
Operand Data: Longword data is written into the specified debug register. The data is supplied
most-significant word first.
Result Data: Command complete status (0xFFFF) is returned when register write is complete.
15 12 11 8 7 5 4 0
0x2 0xC 100 DRc
D[31:16]
D[15:0]
Figure 30-39. WDMREG BDM Command Format
RDMREG
???
XXX
MS RESULT
NEXT CMD
LS RESULT
XXX
’ILLEGAL’
NEXT CMD
’NOT READY’
WDMREG
???
MS DATA
’NOT READY’
LS DATA
’NOT READY’
XXX
’ILLEGAL’
NEXT CMD
’NOT READY’
NEXT CMD
’CMD COMPLETE’
MCF5282 and MCF5216 ColdFire Microcontroller User’s Manual, Rev. 3