Xilinx DS610 - Manual (Page 82)

Spartan-3A DSP FPGA Family: Pinout Descriptions
DS610 (v3.0) October 4, 2010 www.xilinx.com
Product Specification 82
3 IP_L04P_3 C2 INPUT
3 IO_L02N_3 B1 I/O
3 IO_L02P_3 B2 I/O
3 IP_L66P_3 AE1 INPUT
3 IP_L66N_3/VREF_3 AE2 VREF
3 IO_L65P_3 AD1 I/O
3 IO_L65N_3 AD2 I/O
3 IO_L60N_3 AC1 I/O
3 IO_L64P_3 AC2 I/O
3 IO_L64N_3 AC3 I/O
3 IO_L60P_3 AB1 I/O
3 IO_L55P_3 AA2 I/O
3 IO_L55N_3 AA3 I/O
3 IP_L58N_3/VREF_3 AA5 VREF
3 IP_L16P_3 G2 INPUT
3 IP_L12P_3 G5 INPUT
3 IP_L08P_3 D2 INPUT
3 IP_L62P_3 AB3 INPUT
3 IP_L58P_3 AA4 INPUT
3 IP_L08N_3 D1 INPUT
3 IP_L62N_3 AB4 INPUT
3 IP_L54N_3 Y4 INPUT
3 VCCO_3 W5 VCCO
3 VCCO_3 T2 VCCO
3 VCCO_3 T8 VCCO
3 VCCO_3 P5 VCCO
3 VCCO_3 L2 VCCO
3 VCCO_3 L8 VCCO
3 VCCO_3 H5 VCCO
3 VCCO_3 E2 VCCO
3 VCCO_3 AB2 VCCO
GND GND W8 GND
GND GND W14 GND
GND GND W19 GND
GND GND W24 GND
GND GND V3 GND
GND GND U10 GND
GND GND U13 GND
GND GND U17 GND
Table 66: Spartan-3A DSP FG676 Pinout for
XC3SD1800A FPGA (Cont’d)
Bank XC3SD1800A Pin Name
FG676
Ball
Type
GND GND T1 GND
GND GND T6 GND
GND GND T12 GND
GND GND T14 GND
GND GND T16 GND
GND GND T21 GND
GND GND T26 GND
GND GND R11 GND
GND GND R13 GND
GND GND R15 GND
GND GND P12 GND
GND GND P16 GND
GND GND P19 GND
GND GND P24 GND
GND GND N3 GND
GND GND N8 GND
GND GND N11 GND
GND GND N15 GND
GND GND M12 GND
GND GND M14 GND
GND GND M16 GND
GND GND L1 GND
GND GND L6 GND
GND GND L11 GND
GND GND L13 GND
GND GND L15 GND
GND GND L21 GND
GND GND L26 GND
GND GND K10 GND
GND GND K17 GND
GND GND J24 GND
GND GND H3 GND
GND GND H8 GND
GND GND H14 GND
GND GND H19 GND
GND GND F1 GND
GND GND F6 GND
GND GND F11 GND
GND GND F16 GND
Table 66: Spartan-3A DSP FG676 Pinout for
XC3SD1800A FPGA (Cont’d)
Bank XC3SD1800A Pin Name
FG676
Ball
Type