AMD SB600 - Manual (Page 126)

©2008 Advanced Micro Devices, Inc. SMBus Module and ACPI Block (Device 20, Function 0)
AMD SB600 Register Reference Manual Proprietary Page 126
2.3.3 Legacy ISA and ACPI Controller
2.3.3.1 Legacy Block Registers
There are two sets of registers in the ACPI/SMBus module. The first set is in the PCI configuration space
and the registers control the behavior of the PCI interface. The second set is in the Memory/IO mapped
address space. These registers control the functions of the module.
2.3.3.1.1 IO-Mapped Control Registers
Register Name Offset Address
Dma_Ch 0 00h
Dma_Ch 1 02h
Dma_Ch 2 04h
Dma_Ch 3 06h
Dma_Status 08h
Dma_WriteRequest 09h
Dma_WriteMask 0Ah
Dma_WriteMode 0Bh
Dma_Clear 0Ch
Dma_MasterClr 0Dh
Dma_ClrMask 0Eh
Dma_AllMask 0Fh
IntrCntrlReg1 20h
IntrCntrlReg2 21h
TimerCh0 40h
TimerCh1 41h
TimerCh2 42h
Tmr1CntrlWord 43h
Nmi_Status 61h
RtcAddrPort 70h
RtcDataPort 71h
AlternatRtcAddrPort 72h
AlternatRtcDataPort 73h
Dma_PageCh2 81h
Dma_PageCh3 82h
Dma_PageCh1 83h
Dma_Page_Reserved1 84h
Dma_Page_Reserved2 85h
Dma_Page_Reserved3 86h
Dma_PageCh0 87h
Dma_Page_Reserved4 88h
Dma_PageCh6 89h
Dma_PageCh7 8Ah
Dma_PageCh5 8Bh
Dma_Page_Reserved5 8Ch
Dma_Page_Reserved6 8Dh
Dma_Page_Reserved7 8Eh
Dma_Refresh 8Fh
FastInit 92h
IntrCntrl2Reg1 A0h
IntrCntrl2Reg2 A1h
Dma2_Ch4Addr C0h
Dma2_Ch4Cnt C2h
Dma2_Ch5Addr C4h
Dma2_Ch5Cnt C6h
Dma2_Ch6Addr C8h