AMD SB600 - Manual (Page 212)

©2008 Advanced Micro Devices, Inc. AC ’97 Controller Functional Descriptions
AMD SB600 Register Reference Manual Proprietary Page 212
Audio Phy Semaphore Reg- RW - 8 bits - [MEM_Reg: A8h]
Field Name Bits Default Description
Audio Phy semaphore 0 0b PHY is ready for Audio to access:
0 = PHY is not ready for Audio to access.
1 = PHY is ready for Audio to access.
The Audio driver can only access the PHY register when the read
back value of this bit is ‘1’ (after writing a ‘1’ to this bit). It is possible
that the read back value is ‘0’ after writing a ‘1’. This means that the
PHY register is not ready for Audio to access. Since the PHY
register can be accessed by both audio and modem controllers, this
bit is used by the audio driver to establish a semaphore handshake
with the modem driver.
The driver is also responsible to clear the bit after its PHY read/write
access.
Note: The driver can check Mem_reg 0x10[8] which indicates a PHY
read access completion. For writing to PHY, the driver can clear the
semaphore bit after the write command.
Reserved 7:1 00h