AMD SB600 User Manual
Page 174
©2008 Advanced Micro Devices, Inc.
SMBus Module and ACPI Block (Device 20, Function 0)
AMD SB600 Register Reference Manual
Proprietary
Page 174
PIO7654Enable - RW – 8 bits - [PM_Reg: A8h]
Field Name
Bits
Default
Description
ProgramIo5Enable
1
0b
Enables IO monitoring for ProgramIO5 (defined by index A2,
A3).
1 = On
0 = Off
ProgramIo6Enable
2
0b
Enables IO monitoring for ProgramIO6 (defined by index A4,
A5).
1 = On
0 = Off
ProgramIo7Enable
3
0b
Enables IO monitoring for ProgramIO7 (defined by index A6,
A7).
1 = On
0 = Off
Spare 7:4
0h
Scratch
bits
PIO7654Enable register
PIO7654Status - RW – 8 bits - [PM_Reg: A9h]
Field Name
Bits
Default
Description
ProgramIo4Status
0
0b
Programmable IO 4 status bit; write 1’b1 to clear the status
bit
ProgramIo5Status
1
0b
Programmable IO 5 status bit; write 1’b1 to clear the status
bit
ProgramIo6Status
2
0b
Programmable IO 6 status bit; write 1’b1 to clear the status
bit
ProgramIo7Status
3
0b
Programmable IO 7 status bit; write 1’b1 to clear the status
bit
Spare 7:4
0h
Scratch
bits
PIO7654Status register
PllDebug– R/W – 8 bits - [PM_Reg: B0h]
Field Name
Bits
Default
Description
PLL_debug_delay
(available after A13)
7:0
08h
These bits are for PLL debugging purposes.
PllDebug register
PllDebug– R/W – 8 bits - [PM_Reg: B1h]
Field Name
Bits
Default
Description
PLL_debug_range
(available after A13)
5:0
00_1001b
These bits are for PLL debugging purposes.
Spare 7:6
00b
Scratch
bits
PllDebug register
AltDebugBusCntrl – R/W – 8 bits - [PM_Reg: B2h]
Field Name
Bits
Default
Description
Disable IDE block
(available after A13)
0
0b
This bit is used to disable entire IDE block.
Spare 7:1
00h
Scratch
bits
AltDebugBusCntrl register
C2Count - R – 8 bits - [PM_Reg: B3h]
Field Name
Bits
Default
Description
C2Count
7:0
00h
The value shows the amount of time the CPU spends in C2.
Each increment represents approximately 0.39% (1/256).
This register is updated by HW automatically every second
C2Count register