AMD SB600 User Manual
Page 144
©2008 Advanced Micro Devices, Inc.
SMBus Module and ACPI Block (Device 20, Function 0)
AMD SB600 Register Reference Manual
Proprietary
Page 144
PmTmr1CurValue - R – 8 bits - [PM_Reg: 0Ch]
Field Name
Bits
Default
Description
PmTmr1CurValue 5:0
-
Current
value of decrementing counter
Reserved 7:6
00b
PwrLedExtEvent - RW – 8 bits - [PM_Reg: 0Dh]
Field Name
Bits
Default
Description
ExtEvent0State
0
-
Logical value of EXTEVENT0. [Read-only]
ExtEvent1State
1
-
Logical value of EXTEVENT1. [Read-only]
ExtEvent0RF
2
0b
Set to one to configure EXTEVENT0 as rising edge sensitive.
0 as falling edge sensitive
ExtEvent1RF
3
0b
Set to one to configure EXTEVENT1 as rising edge sensitive.
0 as falling edge sensitive
Reserved 7:4
0100b
PwrLedExtEvent register.
AcpiControl - RW – 8 bits - [PM_Reg: 0Eh]
Field Name
Bits
Default
Description
AcpiSmiEn
0
0b
Set to 1 to enable SMI# generation when ACPI driver writes
one to GBL_RLS (bit [2] of AcpiPm1CntBlk:00h). When an
SMI# is issued, the SB updates bit [0] of the AcpiStatus
register.
BIOS_RLS
1
0b
Writing 1 to this bit will cause GblStatus to be set. This bit is
always read back as 0.
SmiCmdEn
2
0b
Set to 1 to enable SMI# generation when ACPI driver writes
to the SmiCmd port. When set to 1, SB will update bit 2 of
MiscStatus and issue an SMI# on write to SmiCmd port.
AcpiDecodeEnable
3
0b
Set to 1 to enable SB to decode the ACPI I/O address space.
When set, SB uses the contents of the PM registers at index
20-2B to decode ACPI I/O address.
VRT_SMI_En
4
0b
Set to 1 to enable SB to generate SMI# upon (RTC) VRT low.
Reserved 5
0b
RtcClkPUB
6
0b
This bit controls the integrated pull-up for RTCCLK
0: Enable
1: Disable
BG1RESDIV0_SEL
7
0b
This bit controls the CPU receiver Vref
0: Vref = Vcpu / 2 (recommended setting for P4 CPU)
1: Vref = Vbandgap / 2 = 0.6v (recommended setting for K8
CPU)
AcpiControl register.
AcpiStatus- R – 8 bits - PM_Reg: 0Fh]
Field Name
Bits
Default
Description
AcpiSmiStatus
0
-
Set to 1 by SB to indicate SMI# was due to write to Acpi
power management register.
SerrSmiStatus
1
-
SMI# due to SERR#
SmiCmdStatus
2
-
Set to one by SB to indicate SMI# was due to write to
AcpiSmiCmd port.
SmSmiStatus
3
-
SmBus SMI# status
UsbSmiStatus
4
-
USB SMI# status
SerSmiStatus
5
-
Serial SMI# status
RtcAvailable
6
-
1: Rtc clock running
0: Bad Rtc clock. RTC battery may not be present
NbThermStatus
7
-
NB thermal event status