AMD SB600 User Manual
Page 141
©2008 Advanced Micro Devices, Inc.
SMBus Module and ACPI Block (Device 20, Function 0)
AMD SB600 Register Reference Manual
Proprietary
Page 141
Register Name
Offset Address
SOS3ToS5Enable2 78h
SOS3ToS5Enable3 79h
NoStatusControl0 7Ah
NoStatusControl1 7Bh
MiscEnable7C 7Ch
DprSlpVrMinTime 7Dh
SMAF0 80h
SMAF1 81h
SMAF2 82h
SMAF3 83h
WakePinCntl 84h
CF9Rst 85h
ThermThrotCntl
86h
LdtStpCmd
87h
LdtStartTime 88h
AgpStartTime 89h
LdtAgpTimeCntl 8Ah
StutterTime 8Bh
StpClkDlyTime 8Ch
AbPmeCntl
8Dh
FakeAsr
8Eh
FakeAsrEn 8Fh
GEVENTOUT 90h
GEVENTEN 91h
GEVENTIN 92h
GPM98OUT 94h
GPM98EN 95h
GPM98IN 96h
K8C1ePort 99:98h
EnhanceControl 9Ah
K8C1eReadPort 9Bh
MsiSignature 9E:9Ch
AutoArbDisWaitTime 9Fh
Programlo4RangeLo A0h
Programlo4RangeHi A1h
Programlo5RangeLo A2h
Programlo5RangeHi A3h
Programlo6RangeLo A4h
Programlo6RangeHi A5h
Programlo7RangeLo A6h
Programlo7RangeHi A7h
PIO7654Enable A8h
PIO7654Status A9h
PllDebug B1:B0h
AltDebugBusCntrl B2h
C2Count B3h
C3Count B4h
MiscControl - RW – 8 bits - [PM_Reg: 00h]
Field Name
Bits
Default
Description
Reserved 0
0b
Timer1ExpEn
1
0b
Set to 1 to enable SMI# when PM_TIMER1 expires. When
PM_TIMER1 (inactivity) expires, the SB will update bit 1 of
MiscStatus and issue SMI#. This bit allows the software to
disable/enable all inactivity timer reload enables at indexes
08,09, and 0A.
Timer2ExpEn
2
0b
Set to 1 to enable SMI# when PM_TIMER2 expires.