AMD SB600 - Manual (Page 143)

©2008 Advanced Micro Devices, Inc. SMBus Module and ACPI Block (Device 20, Function 0)
AMD SB600 Register Reference Manual Proprietary Page 143
SmiWakeUpEventStatus2 - RW – 8 bits - [PM_Reg: 06h]
Field Name Bits Default Description
SmiWakeUpEventStatus2 register.
SmiWakeUpEventStatus3 - RW – 8 bits - [PM_Reg: 07h]
Field Name Bits Default Description
ExtEvt0_SMI_Status 0 0b Set to 1 to indicate ExtEvent0 as the source of SMI#. Write 1
to clear this bit.
ExtEvt1_SMI_Status 1 0b Set to 1 to indicate ExtEvent1 as the source of SMI#. Write 1
to clear this bit.
GAME_SMI_Status 2 0b Set to 1 to indicate game port activity as the source of SMI#.
Write 1 to clear this bit.
FDD_SMI_Status 3 0b Set to 1 to indicate floppy activity as the source of SMI#.
Write 1 to clear this bit.
HDD_SMI_Status 4 0b Set to 1 to indicate IDE activity as the source of SMI#. Write
1 to clear this bit.
COM_SMI_Status 5 0b Set to 1 to indicate serial port activity as the source of SMI#.
Write 1 to clear this bit.
LPT_SMI_Status 6 0b Set to 1 to indicate parallel port activity as the source of
SMI#. Write 1 to clear this bit.
SLP_SMI_Status 7 0b Set to 1 to indicate sleep command as the source of SMI#.
Write 1 to clear this bit.
SmiWakeUpEventStatus3 register: Set to one to identify PioRng.
InactiveTmrEventEnable1 - RW – 8 bits - PM_Reg: 08h]
Field Name Bits Default Description
InactiveTmrEventEnable1 7:0 00h Enables Timer 1 reload on IRQ[15:8] activity.
InactiveTmrEventEnable1 register.
InactiveTmrEventEnable2 - RW – 8 bits - [PM_Reg: 09h]
Field Name Bits Default Description
InactiveTmrEventEnable2 7:0 00h Enables Timer 1 reload on {IRQ[7:3], NMI, IRQ[1:0]} activity.
InactiveTmrEventEnable2 register.
InactiveTmrEventEnable3 - RW – 8 bits - [PM_Reg: 0Ah]
Field Name Bits Default Description
ExtEvt0_Timer1Enable 0 0b Enables Timer1 reload on ExtEvent0 inactivity
ExtEvt1_Timer1Enable 1 0b Enables Timer1 reload on ExtEvent1 inactivity
GamePort_Timer1Enable 2 0b Enables Timer1 reload on Gameport inactivity
Floppy_Timer1Enable 3 0b Enables Timer1 reload on Floppy port inactivity
IDE_Timer1Enable 4 0b Enables Timer1 reload on IDE port inactivity
COM_Timer1Enable 5 0b Enables Timer1 reload on COM port inactivity
Parallel_Timer1Enable 6 0b Enables Timer1 reload on Parallel port inactivity
Reserved 7 0b
InactiveTmrEventEnable3 register.
PmTmr1InitValue - RW – 8 bits - [PM_Reg: 0Bh]
Field Name Bits Default Description
PmTmr1InitValue 5:0 000000b 6 bit-timer; Initial/reload value for 6 bit decrementing counter.
Count range from 1 minute to 64 minutes with 4 second
accuracy.
Reserved 7:6 00b