Motorola ColdFire MCF5281 - Manual (Page 666)

IEEE 1149.1 Test Access Port (JTAG)
31-2 Freescale Semiconductor
31.1 Features
The basic features of the JTAG module are the following:
• Performs boundary-scan operations to test circuit board electrical continuity
• Bypasses instruction to reduce the shift register path to a single cell
• Sets chip output pins to safety states while executing the bypass instruction
• Samples the system pins during operation and transparently shift out the result
• Selects between JTAG TAP controller and Background Debug Module (BDM) using a dedicated
JTAG_EN pin
31.2 Modes of Operation
The JTAG_EN pin can select between the following modes of operation:
• JTAG mode
• BDM - background debug mode (For more information, refer to Section 30.5, “Background Debug
Mode (BDM) ).”
31.3 External Signal Description
The JTAG module has five input and one output external signals, as described in Table 31-1 .
31.3.1 Detailed Signal Description
31.3.1.1 JTAG_EN — JTAG Enable
The JTAG_EN pin selects between Debug module and JTAG. If JTAG_EN is low, the Debug module is
selected; if it is high, the JTAG is selected.
Table 31-2 summarizes the pin function selected depending
upon JTAG_EN logic state.
Table 31-1. Signal Properties
Name Direction Function Reset State Pull up
JTAG_EN Input JTAG/BDM selector input — —
TCLK Input JTAG Test clock input — Active
TMS/BKPT Input JTAG Test mode select / BDM Breakpoint — Active
TDI/DSI Input JTAG Test data input / BDM Development serial input — Active
TRST/DSCLK Input JTAG Test reset input / BDM Development serial clock — Active
TDO/DSO Output JTAG Test data output / BDM Development serial output Hi-Z / 0 —
Table 31-2. Pin Function Selected
JTAG_EN = 0 JTAG_EN = 1 Pin Name
MCF5282 and MCF5216 ColdFire Microcontroller User’s Manual, Rev. 3