Renesas M32R-FPU - Manual (Page 106)

3
3-68 M32R-FPU Software Manual (Rev.1.01)
LOCK LOCK
load/store instruction
Load locked
[Mnemonic]
LOCK Rdest,@Rsrc
[Function]
Load locked
LOCK = 1, Rdest = *( int *) Rsrc;
[Description]
The contents of the word at the memory location specified by Rsrc are loaded into Rdest. The
condition bit (C) is unchanged.
This instruction sets the LOCK bit in addition to simple loading.
When the LOCK bit is 1, external bus master access is not accepted.
The LOCK bit is cleared by executing the UNLOCK instruction.
The LOCK bit is located in the CPU and operates based on the LOCK and UNLOCK instruc-
tions. The user cannot directly read or write to this bit.
The LOCK bit is internal to the CPU and is the control bit for receiving all bus right requests
from circuits other than the CPU.
Refer to the Users Manual for non-CPU bus right requests, as the handling differs according to
the type of MCU.
[EIT occurrence]
Address exception (AE)
[Encoding]
dest 0010 LOCK Rdest,@Rsrc src 1101
INSTRUCTIONS
3.2 Instruction description