Renesas M32R-FPU - Manual (Page 147)

3
3-109 M32R-FPU Software Manual (Rev.1.01)
ST ST
load/store instruction
Store
[Mnemonic]
(1) ST Rsrc1,@Rsrc2
(2) ST Rsrc1,@+Rsrc2
(3) ST Rsrc1,@-Rsrc2
(4) ST Rsrc1,@(disp16,Rsrc2)
[Function]
Store
(1) * ( int *) Rsrc2 = Rsrc1;
(2) Rsrc2 += 4, * ( int *) Rsrc2 = Rsrc1;
(3) Rsrc2 -= 4, * ( int *) Rsrc2 = Rsrc1;
(4) * ( int *) ( Rsrc2 + ( signed short ) disp16 ) = Rsrc1;
[Description]
(1) ST stores Rsrc1 in the memory at the address specified by Rsrc2.
(2) ST increments Rsrc2 by 4 and stores Rsrc1 in the memory at the address specified by the
resultant Rsrc2.
(3) ST decrements Rsrc2 by 4 and stores the contents of Rsrc1 in the memory at the address
specified by the resultant Rsrc2.
(4) ST stores Rsrc1 in the memory at the address specified by Rsrc combined with the 16-bit
displacement. The displacement value is sign-extended before the address calculation.
The condition bit (C) is unchanged.
[EIT occurrence]
Address exception (AE)
INSTRUCTIONS
3.2 Instruction description