Renesas M32R-FPU - Manual (Page 179)

APPENDICES
APPENDICES-21 M32R-FPU Software Manual (Rev.1.01)
(2) Underflow Exception (UDF)
The exception occurs when the absolute value of the operation result is less then the
largest describable precision in the floating-point format. Appendix Table 5.3.2 shows
the operation results when a UDF occurs.
Appendix Table 5.3.2 Operation Results due to UDF Exception
Result
when the UDF EIT processing is masked when the UDF EIT processing is executed
Denormalized Numbers round (x2 ^ a)
(The denomalize flag is set only when a = 192 (single-precision),
rounding occurs.) a = 1536 (double-precision)
Note: • When the operation result is rounded, an Inexact Exception is generated simultaneously.
(3) Inexact Exception (IXCT)
The exception occurs when the operation result differs from a result led out with an
infinite range of precision. Appendix Table 5.3.3 shows operation results and the
respective conditions in which each IXCT occurs.
Appendix Table 5.3.3 Operation Results and Respective Conditions for IXCT Exception
Result
Occurrence Condition when the IXCT EIT when the IXCT EIT
processing is masked processing is executed
Overflow occurs in OVF Exception Reference OVF Exception Same as left
masked condition table
Rounding occurs Rounded value Same as left
(4) Zero Division Exception (DIV0)
The exception occurs when a finite, nonzero value is divided by zero. Appendix Table
5.3.4 shows the operation result when a DIV0 occurs.
Appendix Table 5.3.4 Operation Results for DIV0 Exception
Result
Dividend when the DIV0 EIT when the IXCT EIT
processing is masked processing is executed
Nonzero finite value
±
Infinity (Sign of result is Destination unchanged
exclusive-OR (EXOR) of
signs of divider and dividend.)
Please note that the DIV0 EIT operation does not occur in the following factors.
Dividend Operation
0 Invalid Operation Exception occurs
Infinity No Exception occurs (result is “Infinity”)
APPENDIX 5
Appendix 5 IEEE754 Specification Overview