Renesas M32R-FPU - Manual (Page 113)

3
3-75 M32R-FPU Software Manual (Rev.1.01)
MULLO MULLO
DSP function instruction
Multiply low-order halfwords
[Mnemonic]
MULLO Rsrc1,Rsrc2
[Function]
Multiply
accumulator = ( ( signed ) ( Rsrc1 << 16 ) * ( signed short ) Rsrc2 );
[Description]
MULLO multiplies the low-order 16 bits of Rsrc1 and the low-order 16 bits of Rsrc2, and stores
the result in the accumulator.
The LSB of the multiplication result is aligned with bit 47 in the accumulator, and the portion
corresponding to bits 0 through 15 of the accumulator is sign extended. Bits 48 through 63 of the
accumulator are cleared to 0. The low-order 16 bits of Rsrc1 and Rsrc2 are treated as signed
values.
The condition bit (C) is unchanged.
[EIT occurrence]
None
[Encoding]
Rsrc1
Rsrc2 x
0 15 16 31
low-order 16 bits
0
0 15 16 31 32 47 48 63
low-order 16 bits
Value in accumulator after the
execution of the MULLO instruction Sign extension
src1 0011 MULLO Rsrc1,Rsrc2 src2 0001
INSTRUCTIONS
3.2 Instruction description