Renesas M32R-FPU - Manual (Page 88)

3
3-50 M32R-FPU Software Manual (Rev.1.01)
INSTRUCTIONS
3.2 Instruction description
FMUL FMUL
[Mnemonic]
FMUL Rdest,Rsrc1,Rsrc2
[Function]
Floating-point multiply
Rdest = Rsrc1 * Rsrc2 ;
[Description]
Multiply the floating-point single precision value stored in Rsrc1 by the floating-point single
precision value stored in Rsrc2 and store the results in Rdest. The result is rounded according to
the RM field of FPSR. The DN bit of FPSR handles the modification of denormalized numbers.
The condition bit (C) remains unchanged.
[EIT occurrence]
Floating-Point Exceptions (FPE)
• Unimplemented Operation Exception (UIPL)
• Invalid Operation Exception (IVLD)
• Overflow (OVF)
• Underflow (UDF)
• Inexact Exception (IXCT)
[Encoding]
floating-point Instructions
Floating-point multiply
[M32R-FPU Extended Instruction]
src1 1101 src2 0000 dest 0001 0000 0000
FMUL Rdest,Rsrc1,Rsrc2