Renesas M32R-FPU - Manual (Page 53)

3
3-15 M32R-FPU Software Manual (Rev.1.01)
bit operation
Bit clear
[M32R-FPU Extended Instruction]
INSTRUCTIONS
3.2 Instruction description
BCLR BCLR
[Mnemonic]
BCLR #bitpos,@(disp16,Rsrc)
[Function]
Bit operation for memory contents Set 0 to specified bit.
* ( signed char* ) ( Rsrc + ( signed short ) disp16 ) & = ~ ( 1<< ( 7-bitpos ) ) ;
[Description]
BCLR reads the byte data in the memory at the address specified by the Rsrc combined with
the 16-bit displacement, and then stores the value of the bit that was specified by bitpos to be set
to “0”. The displacement is sign-extended before the address calculation. bitpos becomes 0 to 7;
MSB becomes 0 and LSB becomes 7. The memory is accessed in bytes. The LOCK bit is on
while the BCLR instruction is executed, and is cleared when the execution is completed. The
LOCK bit is internal to the CPU and cannot be directly read or written to by the user.
Condition bit C remains unchanged.
The LOCK bit is internal to the CPU and is the control bit for receiving all bus right requests
from circuits other than the CPU.
Refer to the Users Manual for non-CPU bus right requests, as the handling differs according to
the type of MCU.
[EIT occurrence]
None
[Encoding]
bitpos 1010
BCLR #bitpos,@(disp16,Rsrc)
src 0111 disp16 0