Renesas M32R-FPU - Manual (Page 34)

2
2-10 M32R-FPU Software Manual (Rev.1.01)
ACC
0 63
sign 0
RAC instruction
ACC
0 63
sign 0
RACH instruction
< word size round off > < halfword size round off >
data data
0 63 0 63
Note: The actual operation is processed in two steps.
Refer to Chapter 3 for details.
Fig. 2.1.4 DSP function instruction operation 3 (transfer between accumulator and register)
Rdest
0 31
ACC
0 63 15 16 31 32 47 48
MVFACHI
instruction
Rsrc
0 31
ACC
0 63 31 32
MVFACLO
instruction
MVFACMI instruction
MVTACLO
instruction
MVTACHI
instruction
Fig. 2.1.3 DSP function instruction operation 2 (round off)
INSTRUCTION SET
2.1 Instruction set overview