Altera Low Latency Ethernet 10G MAC - Manual (Page 33)

Figure 3-10: Back-to-back Transmission of Normal Frames with Preamble Passthrough Mode Enabled
The following diagram shows back-to-back transmission of normal frames with preamble passthrough
mode enabled.
tx_312_5_clk
avalon_st_tx_startofpacket
avalon_st_tx_valid
avalon_st_tx_ready
avalon_st_tx_endofpacket
avalon_st_tx_error
avalon_st_tx_empty[1:0]
avalon_st_tx_data[31:0]
xgmii_tx_data[31:0]
xgmii_tx_control[3:0]
avalon_st_tx_data[31:24]
avalon_st_tx_data[23:16]
avalon_st_tx_data[15:8]
avalon_st_tx_data[7:0]
xgmii_tx_data[7:0]
xgmii_tx_data[15:8]
xgmii_tx_data[23:16]
xgmii_tx_data[31:24]
* * * * * * * * * * *3 ac8b_600d * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * aa2f_4bbd * * * *
* * * * * * * * * * * * *707 *b * * * * * * *0 * * * * * * * * * * * * * * * * * * * * * * * * * * *707 * * * * * * * * *b
0 f 1 0 1 f 0 e
6f de b3 23 32 5f 00 3b 89 a5 00 ac 0b 71 a0 90 c9 4c f0 6c a4 61 f9 36 22 1a 21 b7 f3 bc a3 69 30 fa 2e a9 87 bb db f5 b5 84 22 ff 64 67 00 4d aa 2c ea c8 7a
2b d2 b4 5f 1f 37 23 05 ab 1b ff 8b 7e d3 bc 59 b0 db 15 ae ad e2 02 0f 21 62 74 c0 36 c8 13 d9 12 15 f0 a4 00 da 45 f9 37 ff bd 03 ac 53 2f 4b 81 e7 04
25 d4 48 e9 ad a5 45 e3 f0 8f b7 60 fa da d7 38 0f a9 60 be 34 4d 83 d4 8c 68 5d e0 c1 26 74 95 65 ac ce 00 79 85 e7 8a 5d f5 3b ba 4b eb 97 24 0d f8 eb 6e ff 03
89 8d 93 66 3a d5 67 62 94 f3 0d 9c ee 3f 2c 44 d5 ca 11 6c 85 4e 7b 26 64 d8 e7 0a 19 a4 5c 9e b0 00 4a 40 0a d5 5b a8 50 83 bd ce 94 48 57 03 bc ff 22 5e 48
fe 8d ad 56 98 fb 8f 50 b3 6f de b3 07 fb 5f 00 89 3b a5 0b 00 71 a0 90 c9 4c f0 6c a4 61 f9 30 22 1a 21 b7 f3 bc a3 84 7a 69 2e 87 a9 bb fb 07 22 ac 23 4a fd 30 fa db f5 7e
8d b9 81 16 88 54 ac b3 fc 2b d2 b4 07 1f 37 23 ab 05 1b 7e ff d3 bc 59 b0 db 15 ae ad e2 02 0f 21 62 74 c0 36 f9 04 c8 12 f0 15 a4 45 07 37 8b 5f a6 13 d9 f4 da fd
2b 0f 49 ca 38 40 9f f8 14 25 d4 48 07 ad a5 45 f0 e3 8f fa b7 da d7 38 0f a9 60 be 34 4d 83 d4 68 5d 8c e0 eb 6e e7 0d c1 95 ac 65 ce 85 07 8a 60 e9 0a 26 74 0f 79
d6 38 84 f0 3a 76 7f c5 9c 89 8d 93 07 3a d5 67 62 94 9c f3 ee 3f 2c 44 d5 ca 11 6c 85 4e 7b 26 64 d8 03 bc 0a 57 e7 a4 9e 5c b0 40 07 d5 0d 66 e7 0a 19 ce 4a 5e 48
Figure 3-11: Error Condition—Underflow
The following diagrams show an underflow on the transmit datapath followed by the transmission of a
normal frame.
0
c990_2f08
0
0707_0707
f 0 0 f
*c61
*0707
97
36
6c
61 c9
90
2f
08
fc
07
07
07
07 07
07
07
07
tx_312_5_clk
avalon_st_tx_startofpacket
avalon_st_tx_valid
avalon_st_tx_ready
avalon_st_tx_endofpacket
avalon_st_tx_error
avalon_st_tx_empty[1:0]
avalon_st_tx_data[31:0]
xgmii_tx_data[31:0]
xgmii_tx_control[3:0]
avalon_st_tx_data[31:24]
avalon_st_tx_data[23:16]
avalon_st_tx_data[15:8]
avalon_st_tx_data[7:0]
xgmii_tx_data[7:0]
xgmii_tx_data[15:8]
xgmii_tx_data[23:16]
xgmii_tx_data[31:24]
pulse_tx_udf_errcnt
An underflow happens in the middle of a frame that results in a premature termination on the XGMII.
The remaining data from the Avalon-ST transmit interface is still received after the underflow but the
data is dropped. The transmission of the next frame is not affected by the underflow.
UG-01144
2014.12.15
TX Timing Diagrams 3-11
Functional Description of LL Ethernet 10G MAC Altera Corporation
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