Altera Low Latency Ethernet 10G MAC - Manual (Page 41)

The following figure shows the transmission of an XON pause frame. The MAC sets the destination
address field to the global multicast address, 01-80-C2-00-00-01 (0x010000c28001) and the source address
to the MAC primary address configured in the
tx_addrins_macaddr0
and
tx_addrins_madaddr1
registers.
Figure 3-17: XON Pause Frame Transmission
tx_clk_clk
FB 55 01 00 FD
xgmii_tx_control[3]
xgmii_tx_data[31:24]
xgmii_tx_control[2]
xgmii_tx_data[23:16]
xgmii_tx_control[1]
xgmii_tx_data[15:8]
xgmii_tx_control[0]
xgmii_tx_data[7:0]
00 88 88 96
55 55 80 00 01 CC 08 96
55 55 C2 00 EE AA 96
55 D5 00 00 CC EE 01 96
Priority-Based Flow Control
This section describes the PFC frame reception and transmission. Follow these steps to use the PFC:
1. Turn on the Priority-based flow control (PFC) parameter and specify the number of priority levels
using the Number of PFC priorities parameter. You can specify between 2 to 8 PFC priority levels.
2. Set the following registers.
• On the transmit datapath:
• Set
tx_pauseframe_enable
to 0 to disable the IEEE 802.3 flow control.
• Set
tx_pfc_priority_enable[n]
to 1 to enable the PFC for priority queue n.
• On the receive datapath:
• Set the
IGNORE_PAUSE
bit in the
rx_decoder_control
register to 1 to disable the IEEE 802.3
flow control.
• Set the
PFC_IGNORE_PAUSE_n
bit in the
rx_pfc_control
register to 0 to enable the PFC.
3. Connect the
avalon_st_tx_pfc_gen_data
signal to the corresponding RX client logic and the
avalon_st_rx_pfc_pause_data
signal to the corresponding TX client logic.
4. You have the option to configure the MAC RX to forward the PFC frame to the client by setting the
FWD_PFC
bit in the
rx_pfc_control
register to 1. By default, the MAC RX drops the PFC frame after
processing it.
UG-01144
2014.12.15
Priority-Based Flow Control 3-19
Functional Description of LL Ethernet 10G MAC Altera Corporation
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