Altera Low Latency Ethernet 10G MAC - Manual (Page 82)

Word
Offset
Register Name Description Access HW Reset
Value
0x0172
tx_stats_etherStatsJabbers
36-bit statistics counter that collects
the number of oversized TX or RX
frames with CRC error. This count
includes invalid frame types.
RO 0x0
0x0173
0x01F2
rx_stats_etherStatsJabbers
0x01F3
0x0174
tx_stats_etherStatsCRCErr
36-bit statistics counter that collects
the number of TX or RX frames with
CRC error, whose length is between 64
and the maximum frame length
specified in the register. This count
includes errored and invalid frames.
RO 0x0
0x0175
0x01F4
rx_stats_etherStatsCRCErr 0x01F5
0x0176
tx_stats_unicastMACCtrlFrames 36-bit statistics counter that collects
the number of valid TX or RX unicast
control frames.
RO 0x0
0x0177
0x01F6
rx_stats_unicastMACCtrlFrames
0x01F7
0x0178
tx_stats_multicastMACCtrlFrames 36-bit statistics counter that collects
the number of valid TX or RX
multicast control frames.
RO 0x0
0x0179
0x01F8
rx_stats_multicastMACCtrlFrames
0x01F9
0x017A
tx_stats_broadcastMACCtrlFrames 36-bit statistics counter that collects
the number of valid TX or RX
broadcast control frames.
RO 0x0
0x017B
0x01FA
rx_stats_broadcastMACCtrlFrames
0x01FB
0x017C
tx_stats_PFCMACCtrlFrames 36-bit statistics counter that collects
the number of valid TX or RX PFC
frames.
RO 0x0
0x017D
0x01FC
rx_stats_PFCMACCtrlFrames
0x01FD
4-30 Statistics Registers
UG-01144
2014.12.15
Altera Corporation Configuration Registers for LL Ethernet 10G MAC
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