Altera LVDS SERDES Transmitter / Receiver User Manual
Page 38
Parameter
Type
Description
pll_self_reset_on_loss_lock
String
The values are
ON
and
OFF
. If omitted, the
default value is
OFF
. When this parameter is
enabled, the PLL is reset when it loses lock. This
parameter is valid for Cyclone III, Cyclone IV,
Stratix III, and Stratix IV devices when the
implement_in_les
parameter is set to ON.
port_rx_channel_data_align
String
Edge-sensitive bit-slip control signal. Each
rising edge on this signal causes the data re-
alignment circuitry to shift the word boundary
by one bit. The minimum pulse width require‐
ment is one parallel clock cycle. There is no
maximum pulse width requirement. Determines
if the
rx_channel_data_align
port is used or
unused. The values are
PORT_USED
,
PORT_
UNUSED
, and
PORT_CONNECTIVITY
. When set to
PORT_USED
, the
rx_channel_data_align
port
is used. When set to
PORT_UNUSED
, the
rx_
channel_data_align
port is unused. When set
to
PORT_CONNECTIVITY
, the Quartus II software
checks the connectivity of the
rx_channel_
data_align
port to determine port usage. If
omitted, the default value is
PORT_
CONNECTIVITY
.
port_rx_data_align
String
Determines if the
rx_align_data_reg
port is
used or unused. The values are
PORT_USED
,
PORT_UNUSED
, and
PORT_CONNECTIVITY
. When
set to
PORT_USED
, the
rx_align_data_reg
port
is used. When set to
PORT_UNUSED
, the
rx_
align_data_reg
port is unused. When set to
PORT_CONNECTIVITY
, the Quartus II software
checks the connectivity of the
rx_align_data_
reg
port to determine port usage. If omitted, the
default value is
PORT_CONNECTIVITY
.
registered_data_align_input
String
Specifies whether the
rx_align_data_reg
port
is registered. The values are
ON
and
OFF
. If
omitted, the default is
ON
. Only available for
Stratix and Stratix GX devices.
registered_output
String
Indicates whether the
rx_out[]
port should be
registered. The values are
ON
and
OFF
. If
omitted, the default is
ON
. If the
registered_
output
parameter is set to
OFF
, you should pre-
register the
rx_out[]
port in the logic feeding
the receiver.
38
Command Line Interface Parameters
UG-MF9504
2014.12.15
Altera Corporation
LVDS SERDES Transmitter/Receiver IP Cores User Guide