Genicom 3600 - Manual (Page 163)

Appendix
A-9
A
Memory
The MC68332 has separate address busses and data busses. All I/O is memory
mapped and the SIM chip selects are used to select program space, data space,
and I/O.
Static RAM
The 3600 comes with 128K of battery backed static RAM. The RAM is
configured as 128Kx8. The chip select for accessing SRAM should be
configured to at least one wait state. The RAM can also be upgraded to
512K x 8 by swapping the component at location U6. The jumper between pins
1 and 2 of J3 must be removed and placed across pins 2 and 3.
RAM Access Time
Processor access time >= RAM access time
3 x CLK >= Tcslow + Tramaccess + Tsetup + Thc32
3 x 1/16 MHz >= 30 ns + 120 ns + 5 ns + 18 ns
187.5 ns >=173 ns
EPROM
The EPROM for the 3600 consists of two 512K x 8 EPROMs configured as 512K
x 16, giving a total of 1M of EPROM space. The EPROMs have an access time
of 150 ns and do not require wait states.
EPROM Access Time
Processor access time >= EPROM access time
2 x CLK >= Tcslow + Tepromaccess + Tsetup
2 x 1/16 MHz >= 30 ns + 70 ns +5 ns
125 ns >= 105 ns
DRAM
The main memory consists of 256K of dynamic RAM. The DRAM is configured
as 256K x 16, IC U26. To support the DRAM interface, GAL U13 is used to
handle refresh and control lines between the DRAM and the processor. See
Part II, Appendix A for GAL listings of the current configuration. Multiplexors
U16, U18, and U20 are used to generate the row and column addresses for the
DRAM.